[09/43] drm/i915: Parametrize DDI_BUF_TRANS registers
diff mbox

Message ID 1442595836-23981-10-git-send-email-ville.syrjala@linux.intel.com
State New
Headers show

Commit Message

Ville Syrjala Sept. 18, 2015, 5:03 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

FIXME: Should there be a WARN(i != 9) or something, or what does the
entry 9 comment mean?

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h  |  3 ++-
 drivers/gpu/drm/i915/intel_ddi.c | 19 +++++++++----------
 2 files changed, 11 insertions(+), 11 deletions(-)

Comments

Jani Nikula Sept. 21, 2015, 7:59 a.m. UTC | #1
On Fri, 18 Sep 2015, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> FIXME: Should there be a WARN(i != 9) or something, or what does the
> entry 9 comment mean?

Either the code, the comment, or both are bust. Needs to be checked.

However, this patch does not change that part for the better or for
worse, so

Reviewed-by: Jani Nikula <jani.nikula@intel.com>



>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h  |  3 ++-
>  drivers/gpu/drm/i915/intel_ddi.c | 19 +++++++++----------
>  2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 13b52f7..61414c8 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7194,7 +7194,8 @@ enum skl_disp_power_wells {
>  /* DDI Buffer Translations */
>  #define DDI_BUF_TRANS_A				0x64E00
>  #define DDI_BUF_TRANS_B				0x64E60
> -#define DDI_BUF_TRANS(port) _PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B)
> +#define DDI_BUF_TRANS_LO(port, i) (_PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B) + (i) * 8)
> +#define DDI_BUF_TRANS_HI(port, i) (_PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B) + (i) * 8 + 4)
>  
>  /* Sideband Interface (SBI) is programmed indirectly, via
>   * SBI_ADDR, which contains the register offset; and SBI_DATA,
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 5b600bf..9e640ea 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -414,7 +414,6 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
>  				      bool supports_hdmi)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u32 reg;
>  	u32 iboost_bit = 0;
>  	int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
>  	    size;
> @@ -505,11 +504,11 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
>  		BUG();
>  	}
>  
> -	for (i = 0, reg = DDI_BUF_TRANS(port); i < size; i++) {
> -		I915_WRITE(reg, ddi_translations[i].trans1 | iboost_bit);
> -		reg += 4;
> -		I915_WRITE(reg, ddi_translations[i].trans2);
> -		reg += 4;
> +	for (i = 0; i < size; i++) {
> +		I915_WRITE(DDI_BUF_TRANS_LO(port, i),
> +			   ddi_translations[i].trans1 | iboost_bit);
> +		I915_WRITE(DDI_BUF_TRANS_HI(port, i),
> +			   ddi_translations[i].trans2);
>  	}
>  
>  	if (!supports_hdmi)
> @@ -521,10 +520,10 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
>  		hdmi_level = hdmi_default_entry;
>  
>  	/* Entry 9 is for HDMI: */
> -	I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
> -	reg += 4;
> -	I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans2);
> -	reg += 4;
> +	I915_WRITE(DDI_BUF_TRANS_LO(port, i),
> +		   ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
> +	I915_WRITE(DDI_BUF_TRANS_HI(port, i),
> +		   ddi_translations_hdmi[hdmi_level].trans2);
>  }
>  
>  /* Program DDI buffers translations for DP. By default, program ports A-D in DP
> -- 
> 2.4.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 13b52f7..61414c8 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7194,7 +7194,8 @@  enum skl_disp_power_wells {
 /* DDI Buffer Translations */
 #define DDI_BUF_TRANS_A				0x64E00
 #define DDI_BUF_TRANS_B				0x64E60
-#define DDI_BUF_TRANS(port) _PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B)
+#define DDI_BUF_TRANS_LO(port, i) (_PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B) + (i) * 8)
+#define DDI_BUF_TRANS_HI(port, i) (_PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B) + (i) * 8 + 4)
 
 /* Sideband Interface (SBI) is programmed indirectly, via
  * SBI_ADDR, which contains the register offset; and SBI_DATA,
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 5b600bf..9e640ea 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -414,7 +414,6 @@  static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
 				      bool supports_hdmi)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 reg;
 	u32 iboost_bit = 0;
 	int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
 	    size;
@@ -505,11 +504,11 @@  static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
 		BUG();
 	}
 
-	for (i = 0, reg = DDI_BUF_TRANS(port); i < size; i++) {
-		I915_WRITE(reg, ddi_translations[i].trans1 | iboost_bit);
-		reg += 4;
-		I915_WRITE(reg, ddi_translations[i].trans2);
-		reg += 4;
+	for (i = 0; i < size; i++) {
+		I915_WRITE(DDI_BUF_TRANS_LO(port, i),
+			   ddi_translations[i].trans1 | iboost_bit);
+		I915_WRITE(DDI_BUF_TRANS_HI(port, i),
+			   ddi_translations[i].trans2);
 	}
 
 	if (!supports_hdmi)
@@ -521,10 +520,10 @@  static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
 		hdmi_level = hdmi_default_entry;
 
 	/* Entry 9 is for HDMI: */
-	I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
-	reg += 4;
-	I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans2);
-	reg += 4;
+	I915_WRITE(DDI_BUF_TRANS_LO(port, i),
+		   ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
+	I915_WRITE(DDI_BUF_TRANS_HI(port, i),
+		   ddi_translations_hdmi[hdmi_level].trans2);
 }
 
 /* Program DDI buffers translations for DP. By default, program ports A-D in DP