From patchwork Wed Sep 30 15:30:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Zabel X-Patchwork-Id: 7299321 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8206B9F731 for ; Wed, 30 Sep 2015 15:30:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A08C1206ED for ; Wed, 30 Sep 2015 15:30:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 85BCB206BD for ; Wed, 30 Sep 2015 15:30:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 171377A08F; Wed, 30 Sep 2015 08:30:23 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from metis.ext.pengutronix.de (metis.ext.4.pengutronix.de [92.198.50.35]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6DA386EC2A for ; Wed, 30 Sep 2015 08:30:18 -0700 (PDT) Received: from dude.hi.4.pengutronix.de ([10.1.0.7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1ZhJKi-00006J-AZ; Wed, 30 Sep 2015 17:30:16 +0200 From: Philipp Zabel To: dri-devel@lists.freedesktop.org Subject: [RFC v3 7/7] drm/mediatek: enable hdmi output control bit Date: Wed, 30 Sep 2015 17:30:06 +0200 Message-Id: <1443627006-15319-8-git-send-email-p.zabel@pengutronix.de> X-Mailer: git-send-email 2.5.3 In-Reply-To: <1443627006-15319-1-git-send-email-p.zabel@pengutronix.de> References: <1443627006-15319-1-git-send-email-p.zabel@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.7 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: dri-devel@lists.freedesktop.org Cc: Mark Rutland , devicetree@vger.kernel.org, Paul Bolle , YT Shen , Jitao Shi , Jie Qiu , Pawel Moll , Ian Campbell , Cawa Cheng , Rob Herring , linux-mediatek@lists.infradead.org, Kumar Gala , Matthias Brugger , kernel@pengutronix.de X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jie Qiu MT8173 HDMI hardware has a output control bit to enable/disable HDMI output. Because of security reason, so this bit can ONLY be controlled in ARM supervisor mode. Now the only way to enter ARM supervisor is the ARM trusted firmware. So atf provides a API for HDMI driver to call to setup this HDMI control bit to enable HDMI output in supervisor mode. Signed-off-by: Jie Qiu Signed-off-by: Philipp Zabel --- drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 11 +++++++++++ drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c b/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c index 2d08b78..d7bc835 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c @@ -20,9 +20,16 @@ #include #include #include +#include #include #include +static int (*invoke_psci_fn)(u64, u64, u64, u64); +typedef int (*psci_initcall_t)(const struct device_node *); + +asmlinkage int __invoke_psci_fn_hvc(u64, u64, u64, u64); +asmlinkage int __invoke_psci_fn_smc(u64, u64, u64, u64); + #define MTK_HDMI_READ_BANK(bank) \ static u32 mtk_hdmi_read_##bank(struct mtk_hdmi *hdmi, \ u32 offset) \ @@ -214,6 +221,10 @@ void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable) { + invoke_psci_fn = __invoke_psci_fn_smc; + invoke_psci_fn(MTK_SIP_SET_AUTHORIZED_SECURE_REG, + 0x14000904, 0x80000000, 0); + if (enable) { mtk_hdmi_mask_sys(hdmi, HDMI_SYS_CFG20, HDMI_PCLK_FREE_RUN, HDMI_PCLK_FREE_RUN); diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h index baf629b..41a9b1f 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h @@ -351,4 +351,5 @@ #define HDMI_PORD_INT_CLR BIT(17) #define HDMI_FULL_INT_CLR BIT(20) +#define MTK_SIP_SET_AUTHORIZED_SECURE_REG 0x82000001 #endif