From patchwork Tue Oct 20 09:11:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7444161 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4DF749F37F for ; Tue, 20 Oct 2015 09:12:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 722F72081A for ; Tue, 20 Oct 2015 09:12:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 66E842080D for ; Tue, 20 Oct 2015 09:12:23 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZoSxy-0005jk-Rk; Tue, 20 Oct 2015 09:12:22 +0000 Received: from mail-pa0-f52.google.com ([209.85.220.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZoSxi-0005NQ-Dg; Tue, 20 Oct 2015 09:12:07 +0000 Received: by padhk11 with SMTP id hk11so15919806pad.1; Tue, 20 Oct 2015 02:11:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Mb8VG58svHJZE7WAiplrkqvA+SMDKXazVBh8QnJGlSU=; b=XVyZsHA8Jbu37zEorSByyTx66n7ShwqvlYLziQUUfDyVuyMcWBzOZyv/qiVKvqeELD x7AllrQ+ceO3fTTgyZlMLWfsNDFOOQ/BGGaXD944v+9EWXpWlHNwv6A4xtgum1B6w74J IGOpBtZWOU2CCFEw9DWz6T5hn7qhrLant0ordWaiChfatT+vysjzZ05RndfS98s01gDw LIttvN9J7CD8ep4Ji0jDtNxe1Hd3oVZ/+a96q7QgTE4qLm+1VRbl4LvlwjofLdc93GMu kvRvZCQDzxr04yFujqwFHQf0PEu/ojtDsO0DqXzy+aiZM20F5esbK7SQ+eko1fpRNroi MdfQ== X-Received: by 10.68.213.73 with SMTP id nq9mr2809636pbc.104.1445332305679; Tue, 20 Oct 2015 02:11:45 -0700 (PDT) Received: from localhost.localdomain ([43.226.228.195]) by smtp.gmail.com with ESMTPSA id ez1sm2562847pab.6.2015.10.20.02.11.41 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Oct 2015 02:11:45 -0700 (PDT) From: Caesar Wang To: Eduardo Valentin , Heiko Stuebner Subject: [PATCH 2/4] thermal: rockchip: ensure the otp state before resetting the controller Date: Tue, 20 Oct 2015 17:11:02 +0800 Message-Id: <1445332264-6054-3-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445332264-6054-1-git-send-email-wxt@rock-chips.com> References: <1445332264-6054-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151020_021206_636663_6B1500F2 X-CRM114-Status: GOOD ( 16.89 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pm@vger.kernel.org, Dmitry Torokhov , linux-kernel@vger.kernel.org, dianders@chromium.org, linux-rockchip@lists.infradead.org, Zhang Rui , linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We need the OTP pin is gpio state before resetting the TSADC controller, since the tshut polarity will generate a high signal. Says: The TSHUT temperature is setting more than 80 degree, the default tshut polarity is high. If T > 80C, the OTP output the High Signal. If T < 80C, the OTP output the Low Signal. On the moment, the TSADC controller is reset, the tshut polarity will be low in a short period of time. So: If T < 80C, the OTP output the High Signal. If T > 80C, the OTP output the Low Signal. In some cases, the OTP pin is connected to the PMIC, maybe the PMIC can accept the reset response time to avoid this issue. In other words, the system will be always reboot if we make the OTP pin is connected the others IC to control the power. Signed-off-by: Caesar Wang --- drivers/thermal/rockchip_thermal.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index c89ffb2..c53e318 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -22,6 +22,7 @@ #include #include #include +#include /** * If the temperature over a period of time High, @@ -79,6 +80,9 @@ struct rockchip_thermal_sensor { struct rockchip_thermal_data { const struct rockchip_tsadc_chip *chip; + struct pinctrl *pinctrl; + struct pinctrl_state *pins_default; + struct pinctrl_state *pins_otp; struct platform_device *pdev; struct reset_control *reset; @@ -548,6 +552,28 @@ static int rockchip_thermal_probe(struct platform_device *pdev) goto err_disable_clk; } + /* + * We need the OTP pin is gpio state before reset the TSADC controller + * since the tshut polarity will generate a high signal. + */ + + thermal->pinctrl = devm_pinctrl_get(&pdev->dev); + if (IS_ERR(thermal->pinctrl)) { + error = PTR_ERR(thermal->pinctrl); + dev_err(&pdev->dev, "failed to get thermal pinctrl: %d\n", + error); + goto err_disable_pclk; + } + + thermal->pins_default = pinctrl_lookup_state(thermal->pinctrl, + "default"); + if (IS_ERR(thermal->pins_default)) + dev_warn(&pdev->dev, "could not get the pinctrl default state\n"); + + thermal->pins_otp = pinctrl_lookup_state(thermal->pinctrl, "otp_out"); + if (IS_ERR(thermal->pins_otp)) + dev_warn(&pdev->dev, "could not get otp state\n"); + rockchip_thermal_reset_controller(thermal->reset); error = rockchip_configure_from_dt(&pdev->dev, np, thermal); @@ -592,6 +618,8 @@ static int rockchip_thermal_probe(struct platform_device *pdev) for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); + pinctrl_select_state(thermal->pinctrl, thermal->pins_otp); + platform_set_drvdata(pdev, thermal); return 0; @@ -660,6 +688,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev) if (error) return error; + pinctrl_select_state(thermal->pinctrl, thermal->pins_default); + rockchip_thermal_reset_controller(thermal->reset); thermal->chip->initialize(thermal->regs, thermal->tshut_polarity); @@ -678,6 +708,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev) for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); + pinctrl_select_state(thermal->pinctrl, thermal->pins_otp); + return 0; }