From patchwork Mon Nov 2 09:13:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiao Guangrong X-Patchwork-Id: 7535011 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 12C77BEEA4 for ; Mon, 2 Nov 2015 09:20:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9956520411 for ; Mon, 2 Nov 2015 09:20:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 08FD9203FB for ; Mon, 2 Nov 2015 09:20:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753492AbbKBJUt (ORCPT ); Mon, 2 Nov 2015 04:20:49 -0500 Received: from mga02.intel.com ([134.134.136.20]:39769 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753488AbbKBJUc (ORCPT ); Mon, 2 Nov 2015 04:20:32 -0500 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 02 Nov 2015 01:20:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,234,1444719600"; d="scan'208";a="840963378" Received: from xiaoreal1.sh.intel.com (HELO xiaoreal1.sh.intel.com.sh.intel.com) ([10.239.48.79]) by fmsmga002.fm.intel.com with ESMTP; 02 Nov 2015 01:20:05 -0800 From: Xiao Guangrong To: pbonzini@redhat.com, imammedo@redhat.com Cc: gleb@kernel.org, mtosatti@redhat.com, stefanha@redhat.com, mst@redhat.com, rth@twiddle.net, ehabkost@redhat.com, dan.j.williams@intel.com, kvm@vger.kernel.org, qemu-devel@nongnu.org, vsementsov@virtuozzo.com, eblake@redhat.com, Xiao Guangrong Subject: [PATCH v7 25/35] nvdimm acpi: init the resource used by NVDIMM ACPI Date: Mon, 2 Nov 2015 17:13:27 +0800 Message-Id: <1446455617-129562-26-git-send-email-guangrong.xiao@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1446455617-129562-1-git-send-email-guangrong.xiao@linux.intel.com> References: <1446455617-129562-1-git-send-email-guangrong.xiao@linux.intel.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A page staring from 0xFF00000 and IO port 0x0a18 - 0xa1b in guest are reserved for NVDIMM ACPI emulation, refer to docs/specs/acpi_nvdimm.txt for detailed design A parameter, 'nvdimm-support', is introduced for PIIX4_PM and ICH9-LPC that controls if nvdimm support is enabled, it is true on default and it is false on 2.4 and its earlier version to keep compatibility Signed-off-by: Xiao Guangrong --- default-configs/i386-softmmu.mak | 1 + default-configs/mips-softmmu.mak | 1 + default-configs/mips64-softmmu.mak | 1 + default-configs/mips64el-softmmu.mak | 1 + default-configs/mipsel-softmmu.mak | 1 + default-configs/x86_64-softmmu.mak | 1 + hw/acpi/Makefile.objs | 1 + hw/acpi/ich9.c | 24 ++++++++++++++ hw/acpi/nvdimm.c | 63 ++++++++++++++++++++++++++++++++++++ hw/acpi/piix4.c | 27 ++++++++++++---- include/hw/acpi/ich9.h | 3 ++ include/hw/i386/pc.h | 10 ++++++ include/hw/mem/nvdimm.h | 34 +++++++++++++++++++ 13 files changed, 161 insertions(+), 7 deletions(-) create mode 100644 hw/acpi/nvdimm.c diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak index 4e84a1c..51e71d4 100644 --- a/default-configs/i386-softmmu.mak +++ b/default-configs/i386-softmmu.mak @@ -48,6 +48,7 @@ CONFIG_IOAPIC=y CONFIG_PVPANIC=y CONFIG_MEM_HOTPLUG=y CONFIG_NVDIMM=y +CONFIG_ACPI_NVDIMM=y CONFIG_XIO3130=y CONFIG_IOH3420=y CONFIG_I82801B11=y diff --git a/default-configs/mips-softmmu.mak b/default-configs/mips-softmmu.mak index 44467c3..6b8b70e 100644 --- a/default-configs/mips-softmmu.mak +++ b/default-configs/mips-softmmu.mak @@ -17,6 +17,7 @@ CONFIG_FDC=y CONFIG_ACPI=y CONFIG_ACPI_X86=y CONFIG_ACPI_MEMORY_HOTPLUG=y +CONFIG_ACPI_NVDIMM=y CONFIG_ACPI_CPU_HOTPLUG=y CONFIG_APM=y CONFIG_I8257=y diff --git a/default-configs/mips64-softmmu.mak b/default-configs/mips64-softmmu.mak index 66ed5f9..ea820f6 100644 --- a/default-configs/mips64-softmmu.mak +++ b/default-configs/mips64-softmmu.mak @@ -17,6 +17,7 @@ CONFIG_FDC=y CONFIG_ACPI=y CONFIG_ACPI_X86=y CONFIG_ACPI_MEMORY_HOTPLUG=y +CONFIG_ACPI_NVDIMM=y CONFIG_ACPI_CPU_HOTPLUG=y CONFIG_APM=y CONFIG_I8257=y diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak index bfca2b2..8993851 100644 --- a/default-configs/mips64el-softmmu.mak +++ b/default-configs/mips64el-softmmu.mak @@ -17,6 +17,7 @@ CONFIG_FDC=y CONFIG_ACPI=y CONFIG_ACPI_X86=y CONFIG_ACPI_MEMORY_HOTPLUG=y +CONFIG_ACPI_NVDIMM=y CONFIG_ACPI_CPU_HOTPLUG=y CONFIG_APM=y CONFIG_I8257=y diff --git a/default-configs/mipsel-softmmu.mak b/default-configs/mipsel-softmmu.mak index 0162ef0..87ab964 100644 --- a/default-configs/mipsel-softmmu.mak +++ b/default-configs/mipsel-softmmu.mak @@ -17,6 +17,7 @@ CONFIG_FDC=y CONFIG_ACPI=y CONFIG_ACPI_X86=y CONFIG_ACPI_MEMORY_HOTPLUG=y +CONFIG_ACPI_NVDIMM=y CONFIG_ACPI_CPU_HOTPLUG=y CONFIG_APM=y CONFIG_I8257=y diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak index e877a86..0a7dc10 100644 --- a/default-configs/x86_64-softmmu.mak +++ b/default-configs/x86_64-softmmu.mak @@ -48,6 +48,7 @@ CONFIG_IOAPIC=y CONFIG_PVPANIC=y CONFIG_MEM_HOTPLUG=y CONFIG_NVDIMM=y +CONFIG_ACPI_NVDIMM=y CONFIG_XIO3130=y CONFIG_IOH3420=y CONFIG_I82801B11=y diff --git a/hw/acpi/Makefile.objs b/hw/acpi/Makefile.objs index 7d3230c..84c082d 100644 --- a/hw/acpi/Makefile.objs +++ b/hw/acpi/Makefile.objs @@ -2,6 +2,7 @@ common-obj-$(CONFIG_ACPI_X86) += core.o piix4.o pcihp.o common-obj-$(CONFIG_ACPI_X86_ICH) += ich9.o tco.o common-obj-$(CONFIG_ACPI_CPU_HOTPLUG) += cpu_hotplug.o common-obj-$(CONFIG_ACPI_MEMORY_HOTPLUG) += memory_hotplug.o +obj-$(CONFIG_ACPI_NVDIMM) += nvdimm.o common-obj-$(CONFIG_ACPI) += acpi_interface.o common-obj-$(CONFIG_ACPI) += bios-linker-loader.o common-obj-$(CONFIG_ACPI) += aml-build.o diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index 1e9ae20..603c1bd 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -280,6 +280,12 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), &pm->acpi_memory_hotplug); } + + if (pm->acpi_nvdimm_state.is_enabled) { + nvdimm_init_acpi_state(pci_address_space(lpc_pci), + pci_address_space_io(lpc_pci), OBJECT(lpc_pci), + &pm->acpi_nvdimm_state); + } } static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, @@ -307,6 +313,20 @@ static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value, s->pm.acpi_memory_hotplug.is_enabled = value; } +static bool ich9_pm_get_nvdimm_support(Object *obj, Error **errp) +{ + ICH9LPCState *s = ICH9_LPC_DEVICE(obj); + + return s->pm.acpi_nvdimm_state.is_enabled; +} + +static void ich9_pm_set_nvdimm_support(Object *obj, bool value, Error **errp) +{ + ICH9LPCState *s = ICH9_LPC_DEVICE(obj); + + s->pm.acpi_nvdimm_state.is_enabled = value; +} + static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, void *opaque, const char *name, Error **errp) @@ -419,6 +439,10 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp) ich9_pm_get_memory_hotplug_support, ich9_pm_set_memory_hotplug_support, NULL); + object_property_add_bool(obj, "nvdimm-support", + ich9_pm_get_nvdimm_support, + ich9_pm_set_nvdimm_support, + NULL); object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8", ich9_pm_get_disable_s3, ich9_pm_set_disable_s3, diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c new file mode 100644 index 0000000..1223da2 --- /dev/null +++ b/hw/acpi/nvdimm.c @@ -0,0 +1,63 @@ +/* + * NVDIMM ACPI Implementation + * + * Copyright(C) 2015 Intel Corporation. + * + * Author: + * Xiao Guangrong + * + * NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT) + * and the DSM specification can be found at: + * http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf + * + * Currently, it only supports PMEM Virtualization. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + */ + +#include "hw/mem/nvdimm.h" + +static uint64_t +nvdimm_dsm_read(void *opaque, hwaddr addr, unsigned size) +{ + return 0; +} + +static void +nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) +{ +} + +static const MemoryRegionOps nvdimm_dsm_ops = { + .read = nvdimm_dsm_read, + .write = nvdimm_dsm_write, + .endianness = DEVICE_LITTLE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, +}; + +void nvdimm_init_acpi_state(MemoryRegion *memory, MemoryRegion *io, + Object *owner, AcpiNVDIMMState *state) +{ + memory_region_init_ram(&state->ram_mr, owner, "nvdimm-acpi-ram", + TARGET_PAGE_SIZE, &error_abort); + vmstate_register_ram_global(&state->ram_mr); + memory_region_add_subregion(memory, NVDIMM_ACPI_MEM_BASE, &state->ram_mr); + + memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state, + "nvdimm-acpi-io", NVDIMM_ACPI_IO_LEN); + memory_region_add_subregion(io, NVDIMM_ACPI_IO_BASE, &state->io_mr); +} diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index b2f5b2c..39b8415 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -34,6 +34,7 @@ #include "hw/acpi/cpu_hotplug.h" #include "hw/hotplug.h" #include "hw/mem/dimm.h" +#include "hw/mem/nvdimm.h" #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/acpi_dev_interface.h" #include "hw/xen/xen.h" @@ -86,6 +87,8 @@ typedef struct PIIX4PMState { AcpiCpuHotplug gpe_cpu; MemHotplugState acpi_memory_hotplug; + + AcpiNVDIMMState acpi_nvdimm_state; } PIIX4PMState; #define TYPE_PIIX4_PM "PIIX4_PM" @@ -93,7 +96,8 @@ typedef struct PIIX4PMState { #define PIIX4_PM(obj) \ OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM) -static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, +static void piix4_acpi_system_hot_add_init(MemoryRegion *mem_parent, + MemoryRegion *io_parent, PCIBus *bus, PIIX4PMState *s); #define ACPI_ENABLE 0xf1 @@ -486,7 +490,8 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp) qemu_add_machine_init_done_notifier(&s->machine_ready); qemu_register_reset(piix4_reset, s); - piix4_acpi_system_hot_add_init(pci_address_space_io(dev), dev->bus, s); + piix4_acpi_system_hot_add_init(pci_address_space(dev), + pci_address_space_io(dev), dev->bus, s); piix4_pm_add_propeties(s); } @@ -558,21 +563,27 @@ static const MemoryRegionOps piix4_gpe_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, +static void piix4_acpi_system_hot_add_init(MemoryRegion *mem_parent, + MemoryRegion *io_parent, PCIBus *bus, PIIX4PMState *s) { memory_region_init_io(&s->io_gpe, OBJECT(s), &piix4_gpe_ops, s, "acpi-gpe0", GPE_LEN); - memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe); + memory_region_add_subregion(io_parent, GPE_BASE, &s->io_gpe); - acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent, + acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, io_parent, s->use_acpi_pci_hotplug); - acpi_cpu_hotplug_init(parent, OBJECT(s), &s->gpe_cpu, + acpi_cpu_hotplug_init(io_parent, OBJECT(s), &s->gpe_cpu, PIIX4_CPU_HOTPLUG_IO_BASE); if (s->acpi_memory_hotplug.is_enabled) { - acpi_memory_hotplug_init(parent, OBJECT(s), &s->acpi_memory_hotplug); + acpi_memory_hotplug_init(io_parent, OBJECT(s), &s->acpi_memory_hotplug); + } + + if (s->acpi_nvdimm_state.is_enabled) { + nvdimm_init_acpi_state(mem_parent, io_parent, OBJECT(s), + &s->acpi_nvdimm_state); } } @@ -592,6 +603,8 @@ static Property piix4_pm_properties[] = { use_acpi_pci_hotplug, true), DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState, acpi_memory_hotplug.is_enabled, true), + DEFINE_PROP_BOOL("nvdimm-support", PIIX4PMState, + acpi_nvdimm_state.is_enabled, true), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h index 345fd8d..66a99d4 100644 --- a/include/hw/acpi/ich9.h +++ b/include/hw/acpi/ich9.h @@ -26,6 +26,7 @@ #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/acpi_dev_interface.h" #include "hw/acpi/tco.h" +#include "hw/mem/nvdimm.h" typedef struct ICH9LPCPMRegs { /* @@ -52,6 +53,8 @@ typedef struct ICH9LPCPMRegs { MemHotplugState acpi_memory_hotplug; + AcpiNVDIMMState acpi_nvdimm_state; + uint8_t disable_s3; uint8_t disable_s4; uint8_t s4_val; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 62e8fb5..47162cf 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -322,6 +322,16 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); .driver = "host" "-" TYPE_X86_CPU,\ .property = "host-cache-info",\ .value = "on",\ + },\ + {\ + .driver = "PIIX4_PM",\ + .property = "nvdimm-support",\ + .value = "off",\ + },\ + {\ + .driver = "ICH9-LPC",\ + .property = "nvdimm-support",\ + .value = "off",\ }, #define PC_COMPAT_2_3 \ diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h index cd90957..f0b1dda 100644 --- a/include/hw/mem/nvdimm.h +++ b/include/hw/mem/nvdimm.h @@ -33,6 +33,15 @@ */ #define MIN_NAMESPACE_LABEL_SIZE (128UL << 10) +/* + * A page staring from 0xFF00000 and IO port 0x0a18 - 0xa1b in guest are + * reserved for NVDIMM ACPI emulation, refer to docs/specs/acpi_nvdimm.txt + * for detailed design. + */ +#define NVDIMM_ACPI_MEM_BASE 0xFF000000ULL +#define NVDIMM_ACPI_IO_BASE 0x0a18 +#define NVDIMM_ACPI_IO_LEN 4 + #define TYPE_NVDIMM "nvdimm" #define NVDIMM(obj) OBJECT_CHECK(NVDIMMDevice, (obj), TYPE_NVDIMM) #define NVDIMM_CLASS(oc) OBJECT_CLASS_CHECK(NVDIMMClass, (oc), TYPE_NVDIMM) @@ -80,4 +89,29 @@ struct NVDIMMClass { }; typedef struct NVDIMMClass NVDIMMClass; +/* + * AcpiNVDIMMState: + * @is_enabled: detect if NVDIMM support is enabled. + * + * @fit: fit buffer which will be accessed via ACPI _FIT method. It is + * dynamically built based on current NVDIMM devices so that it does + * not require to keep consistent during live migration. + * + * @ram_mr: RAM-based memory region which is mapped into guest address + * space and used to transfer data between OSPM and QEMU. + * @io_mr: the IO region used by OSPM to transfer control to QEMU. + */ +struct AcpiNVDIMMState { + bool is_enabled; + + GArray *fit; + + MemoryRegion ram_mr; + MemoryRegion io_mr; +}; +typedef struct AcpiNVDIMMState AcpiNVDIMMState; + +/* Initialize the memory and IO region needed by NVDIMM ACPI emulation.*/ +void nvdimm_init_acpi_state(MemoryRegion *memory, MemoryRegion *io, + Object *owner, AcpiNVDIMMState *state); #endif