diff mbox

[v4,09/10] arm64: dts: Add main Thermal info to rk3368.dtsi

Message ID 1447044542-30859-10-git-send-email-wxt@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Caesar Wang Nov. 9, 2015, 4:49 a.m. UTC 
This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>

---

Changes in v4: None
Changes in v3: None
Changes in v2:
- fix a copy wrong name.

Changes in v1:
- support the opt gpio pinctrl state.

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 36 ++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

Comments

Heiko Stuebner Feb. 9, 2016, 8:30 a.m. UTC | #1 
Hi Caesar,

Am Montag, 9. November 2015, 12:49:01 schrieb Caesar Wang:
> This patch add the thermal needed info on RK3368.
> Meanwhile, support the trips to throttle for thermal.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Acked-by: Eduardo Valentin <edubezval@gmail.com>

[...]

> @@ -829,6 +855,16 @@
>  			};
>  		};
> 
> +		tsadc {
> +			otp_gpio: otp-gpio {
> +				rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
> +			};
> +
> +			otp_out: otp-out {
> +				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
> +			};
> +		};
> +
>  		uart0 {
>  			uart0_xfer: uart0-xfer {
>  				rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,

As it came up just now, these pinctrl settings seem strange. I.e. according 
to the TRM gpio0b2 [= gpio0 10] func_1 is sc_rst, which seems to be the 
smartcard controller?

It came up because it seems the Tronsmart R68 board seems to use this pin 
for controlling the vcc_host regulator instead.


Heiko
Caesar Wang Feb. 15, 2016, 3:36 a.m. UTC | #2 
? 2016?02?09? 16:30, Heiko Stuebner ??:
> Hi Caesar,
>
> Am Montag, 9. November 2015, 12:49:01 schrieb Caesar Wang:
>> This patch add the thermal needed info on RK3368.
>> Meanwhile, support the trips to throttle for thermal.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> Acked-by: Eduardo Valentin <edubezval@gmail.com>
> [...]
>
>> @@ -829,6 +855,16 @@
>>   			};
>>   		};
>>
>> +		tsadc {
>> +			otp_gpio: otp-gpio {
>> +				rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
>> +			};
>> +
>> +			otp_out: otp-out {
>> +				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
>> +			};
>> +		};
>> +
>>   		uart0 {
>>   			uart0_xfer: uart0-xfer {
>>   				rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,
> As it came up just now, these pinctrl settings seem strange. I.e. according
> to the TRM gpio0b2 [= gpio0 10] func_1 is sc_rst, which seems to be the
> smartcard controller?
>
> It came up because it seems the Tronsmart R68 board seems to use this pin
> for controlling the vcc_host regulator instead.

Yep, that's the incorrect over-temperature protection pin. :-(

Fixed in https://patchwork.kernel.org/patch/8308831/

Thanks Heiko.

>
> Heiko
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index cc093a4..83a2bd2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -45,6 +45,7 @@ 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3368";
@@ -123,6 +124,8 @@ 
 			reg = <0x0 0x0>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_l1: cpu@1 {
@@ -155,6 +158,8 @@ 
 			reg = <0x0 0x100>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_b1: cpu@101 {
@@ -404,6 +409,27 @@ 
 		status = "disabled";
 	};
 
+	thermal-zones {
+		#include "rk3368-thermal.dtsi"
+	};
+
+	tsadc: tsadc@ff280000 {
+		compatible = "rockchip,rk3368-tsadc";
+		reg = <0x0 0xff280000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&otp_gpio>;
+		pinctrl-1 = <&otp_out>;
+		pinctrl-2 = <&otp_gpio>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <95000>;
+		status = "disabled";
+	};
+
 	gmac: ethernet@ff290000 {
 		compatible = "rockchip,rk3368-gmac";
 		reg = <0x0 0xff290000 0x0 0x10000>;
@@ -829,6 +855,16 @@ 
 			};
 		};
 
+		tsadc {
+			otp_gpio: otp-gpio {
+				rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			otp_out: otp-out {
+				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,