@@ -42,7 +42,70 @@ static struct dspbridge_platform_data dspbridge_pdata __initdata = {
static int get_opp_table(struct dspbridge_platform_data *pdata)
{
#ifdef CONFIG_BRIDGE_DVFS
- /* Do nothing now - fill based on PM implementation */
+ /*
+ * TODO: The following code is a direct replacement
+ * improvements are possible.
+ */
+ /* legacy values for 3430 */
+ u32 vdd1_dsp_freq[6][4] = {
+ {0, 0, 0, 0},
+ /*OPP1*/
+ {0, 90000, 0, 86000},
+ /*OPP2*/
+ {0, 180000, 80000, 170000},
+ /*OPP3*/
+ {0, 360000, 160000, 340000},
+ /*OPP4*/
+ {0, 396000, 325000, 376000},
+ /*OPP5*/
+ {0, 430000, 355000, 430000},
+ };
+ struct omap_opp vdd1_rate_table_bridge[] = {
+ {0, 0, 0},
+ /*OPP1*/
+ {S125M, VDD1_OPP1, 0},
+ /*OPP2*/
+ {S250M, VDD1_OPP2, 0},
+ /*OPP3*/
+ {S500M, VDD1_OPP3, 0},
+ /*OPP4*/
+ {S550M, VDD1_OPP4, 0},
+ /*OPP5*/
+ {S600M, VDD1_OPP5, 0},
+ };
+ pdata->mpu_num_speeds = VDD1_OPP5;
+ pdata->mpu_speeds = kzalloc(sizeof(u32) * (pdata->mpu_num_speeds + 1),
+ GFP_KERNEL);
+ if (!pdata->mpu_speeds) {
+ pr_err("%s: unable to allocate memory for the mpu"
+ "frequencies\n", __func__);
+ return -ENOMEM;
+ }
+ pdata->dsp_num_speeds = VDD1_OPP5;
+ pdata->dsp_freq_table = kzalloc(
+ sizeof(struct dsp_shm_freq_table) *
+ (pdata->dsp_num_speeds + 1), GFP_KERNEL);
+ if (!pdata->dsp_freq_table) {
+ pr_err("%s: unable to allocate memory for the dsp"
+ "frequencies\n", __func__);
+ kfree(pdata->mpu_speeds);
+ pdata->mpu_speeds = NULL;
+ return -ENOMEM;
+ }
+ for (i = 0; i <= pdata->mpu_num_speeds; i++)
+ pdata->mpu_speed[i] = vdd1_rate_table_bridge[i].rate;
+ pdata->mpu_max_speed = pdata->mpu_speed[VDD1_OPP5];
+ pdata->mpu_min_speed = pdata->mpu_speed[VDD1_OPP1];
+
+ for (i = 0; i <= pdata->dsp_num_speeds; i++) {
+ pdata->dsp_freq_table[i].u_volts =
+ vdd1_dsp_freq[i][0];
+ pdata->dsp_freq_table[i].dsp_freq = vdd1_dsp_freq[i][1];
+ pdata->dsp_freq_table[i].thresh_min_freq =
+ vdd1_dsp_freq[i][2];
+ pdata->dsp_freq_table[i].thresh_max_freq =
+ vdd1_dsp_freq[i][3];
+ }
#endif
return 0;
}