diff mbox

[v3,03/12] drm/rockchip: return a true clock rate to adjusted_mode

Message ID 1447904131-29328-4-git-send-email-zyw@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Chris Zhong Nov. 19, 2015, 3:35 a.m. UTC
Sometimes the clock driver can not set a accurate clock_rate for vop,
get the true rate of vop_dclk and set it back to adjusted_mode, since
the mipi dsi driver need to use the clock to make the calculation of
Blanking.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---

Changes in v3: None
Changes in v2: None

 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

yao mark Nov. 19, 2015, 7:08 a.m. UTC | #1
On 2015?11?19? 11:35, Chris Zhong wrote:
> +
> +	/*
> +	 * Sometimes the clock driver can not set a accurate clock_rate for vop,
> +	 * get the true rate of vop_dclk and set it back to adjusted_mode.
> +	 */
> +	adjusted_mode->clock = clk_get_rate(vop->dclk) / 1000;
>   out:
>   	ret_clk = clk_enable(vop->dclk);
>   	if (ret_clk < 0) {
Hi Chris
      How about use clk_round_rate to check the clock rate first?
      I think we can check it on vop_crtc_mode_fixup.

Thanks.
- ?ark Yao
Chris Zhong Nov. 19, 2015, 8:10 a.m. UTC | #2
On 11/19/2015 03:08 PM, Mark yao wrote:
> On 2015?11?19? 11:35, Chris Zhong wrote:
>> +
>> +    /*
>> +     * Sometimes the clock driver can not set a accurate clock_rate 
>> for vop,
>> +     * get the true rate of vop_dclk and set it back to adjusted_mode.
>> +     */
>> +    adjusted_mode->clock = clk_get_rate(vop->dclk) / 1000;
>>   out:
>>       ret_clk = clk_enable(vop->dclk);
>>       if (ret_clk < 0) {
> Hi Chris
>      How about use clk_round_rate to check the clock rate first?
>      I think we can check it on vop_crtc_mode_fixup.
Hi Mark
     Nice advice, I'll modify it in next version. Thanks.
>
> Thanks.
> - ?ark Yao
>
>
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 5d8ae5e..9986b311ed 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1232,6 +1232,12 @@  static int vop_crtc_mode_set(struct drm_crtc *crtc,
 	reset_control_deassert(vop->dclk_rst);
 
 	clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
+
+	/*
+	 * Sometimes the clock driver can not set a accurate clock_rate for vop,
+	 * get the true rate of vop_dclk and set it back to adjusted_mode.
+	 */
+	adjusted_mode->clock = clk_get_rate(vop->dclk) / 1000;
 out:
 	ret_clk = clk_enable(vop->dclk);
 	if (ret_clk < 0) {