[01/12] drm/i915: Convert i915_semaphores_is_enabled over to drm_i915_private
diff mbox

Message ID 1448023432-10726-1-git-send-email-chris@chris-wilson.co.uk
State New
Headers show

Commit Message

Chris Wilson Nov. 20, 2015, 12:43 p.m. UTC
We only need our private device struct for checking semapahore status,
and to reduce churn later convert the parameter over now.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_debugfs.c     |  2 +-
 drivers/gpu/drm/i915/i915_dma.c         |  2 +-
 drivers/gpu/drm/i915/i915_drv.c         |  8 ++++----
 drivers/gpu/drm/i915/i915_drv.h         |  2 +-
 drivers/gpu/drm/i915/i915_gem.c         |  2 +-
 drivers/gpu/drm/i915/i915_gem_context.c |  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c   |  2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c | 20 ++++++++++----------
 8 files changed, 20 insertions(+), 20 deletions(-)

Comments

Daniel Vetter Nov. 24, 2015, 1:52 p.m. UTC | #1
On Fri, Nov 20, 2015 at 12:43:41PM +0000, Chris Wilson wrote:
> We only need our private device struct for checking semapahore status,
> and to reduce churn later convert the parameter over now.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Assuming gcc hasn't become unhappy:

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c     |  2 +-
>  drivers/gpu/drm/i915/i915_dma.c         |  2 +-
>  drivers/gpu/drm/i915/i915_drv.c         |  8 ++++----
>  drivers/gpu/drm/i915/i915_drv.h         |  2 +-
>  drivers/gpu/drm/i915/i915_gem.c         |  2 +-
>  drivers/gpu/drm/i915/i915_gem_context.c |  2 +-
>  drivers/gpu/drm/i915/i915_gpu_error.c   |  2 +-
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 20 ++++++++++----------
>  8 files changed, 20 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 8890b115a2c0..359436162f3d 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2859,7 +2859,7 @@ static int i915_semaphore_status(struct seq_file *m, void *unused)
>  	int num_rings = hweight32(INTEL_INFO(dev)->ring_mask);
>  	int i, j, ret;
>  
> -	if (!i915_semaphore_is_enabled(dev)) {
> +	if (!i915_semaphore_is_enabled(dev_priv)) {
>  		seq_puts(m, "Semaphores are disabled\n");
>  		return 0;
>  	}
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index cd79ef114b8e..d41bf214fc84 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -127,7 +127,7 @@ static int i915_getparam(struct drm_device *dev, void *data,
>  		value = 1;
>  		break;
>  	case I915_PARAM_HAS_SEMAPHORES:
> -		value = i915_semaphore_is_enabled(dev);
> +		value = i915_semaphore_is_enabled(dev_priv);
>  		break;
>  	case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
>  		value = 1;
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 1d887459e37f..10c4cc2cece9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -512,9 +512,9 @@ void intel_detect_pch(struct drm_device *dev)
>  	pci_dev_put(pch);
>  }
>  
> -bool i915_semaphore_is_enabled(struct drm_device *dev)
> +bool i915_semaphore_is_enabled(struct drm_i915_private *dev_priv)
>  {
> -	if (INTEL_INFO(dev)->gen < 6)
> +	if (INTEL_INFO(dev_priv)->gen < 6)
>  		return false;
>  
>  	if (i915.semaphores >= 0)
> @@ -525,12 +525,12 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
>  		return false;
>  
>  	/* Until we get further testing... */
> -	if (IS_GEN8(dev))
> +	if (IS_GEN8(dev_priv))
>  		return false;
>  
>  #ifdef CONFIG_INTEL_IOMMU
>  	/* Enable semaphores on SNB when IO remapping is off */
> -	if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
> +	if (INTEL_INFO(dev_priv)->gen == 6 && intel_iommu_gfx_mapped)
>  		return false;
>  #endif
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 343a0a723d2c..fadf2ceb1f72 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3311,7 +3311,7 @@ extern void intel_detect_pch(struct drm_device *dev);
>  extern int intel_trans_dp_port_sel(struct drm_crtc *crtc);
>  extern int intel_enable_rc6(const struct drm_device *dev);
>  
> -extern bool i915_semaphore_is_enabled(struct drm_device *dev);
> +extern bool i915_semaphore_is_enabled(struct drm_i915_private *dev_priv);
>  int i915_reg_read_ioctl(struct drm_device *dev, void *data,
>  			struct drm_file *file);
>  int i915_get_reset_stats_ioctl(struct drm_device *dev, void *data,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 69d8d5fc750b..e6ac049a4698 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3150,7 +3150,7 @@ __i915_gem_object_sync(struct drm_i915_gem_object *obj,
>  	if (i915_gem_request_completed(from_req, true))
>  		return 0;
>  
> -	if (!i915_semaphore_is_enabled(obj->base.dev)) {
> +	if (!i915_semaphore_is_enabled(to_i915(obj->base.dev))) {
>  		struct drm_i915_private *i915 = to_i915(obj->base.dev);
>  		ret = __i915_wait_request(from_req,
>  					  atomic_read(&i915->gpu_error.reset_counter),
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index f2f1e913f17a..55d2985c1dbb 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -483,7 +483,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
>  	u32 flags = hw_flags | MI_MM_SPACE_GTT;
>  	const int num_rings =
>  		/* Use an extended w/a on ivb+ if signalling from other rings */
> -		i915_semaphore_is_enabled(ring->dev) ?
> +		i915_semaphore_is_enabled(to_i915(ring->dev)) ?
>  		hweight32(INTEL_INFO(ring->dev)->ring_mask) - 1 :
>  		0;
>  	int len, i, ret;
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 0d0a7b1a6b4b..d8e035e126d7 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -816,7 +816,7 @@ static void gen8_record_semaphore_state(struct drm_i915_private *dev_priv,
>  	struct intel_engine_cs *to;
>  	int i;
>  
> -	if (!i915_semaphore_is_enabled(dev_priv->dev))
> +	if (!i915_semaphore_is_enabled(dev_priv))
>  		return;
>  
>  	if (!error->semaphore_obj)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 0eaaab92dea0..8d8ba717a022 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2594,7 +2594,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
>  	ring->mmio_base = RENDER_RING_BASE;
>  
>  	if (INTEL_INFO(dev)->gen >= 8) {
> -		if (i915_semaphore_is_enabled(dev)) {
> +		if (i915_semaphore_is_enabled(dev_priv)) {
>  			obj = i915_gem_alloc_object(dev, 4096);
>  			if (obj == NULL) {
>  				DRM_ERROR("Failed to allocate semaphore bo. Disabling semaphores\n");
> @@ -2619,7 +2619,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
>  		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
>  		ring->get_seqno = gen6_ring_get_seqno;
>  		ring->set_seqno = ring_set_seqno;
> -		if (i915_semaphore_is_enabled(dev)) {
> +		if (i915_semaphore_is_enabled(dev_priv)) {
>  			WARN_ON(!dev_priv->semaphore_obj);
>  			ring->semaphore.sync_to = gen8_ring_sync;
>  			ring->semaphore.signal = gen8_rcs_signal;
> @@ -2635,7 +2635,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
>  		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
>  		ring->get_seqno = gen6_ring_get_seqno;
>  		ring->set_seqno = ring_set_seqno;
> -		if (i915_semaphore_is_enabled(dev)) {
> +		if (i915_semaphore_is_enabled(dev_priv)) {
>  			ring->semaphore.sync_to = gen6_ring_sync;
>  			ring->semaphore.signal = gen6_signal;
>  			/*
> @@ -2756,7 +2756,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
>  			ring->irq_put = gen8_ring_put_irq;
>  			ring->dispatch_execbuffer =
>  				gen8_ring_dispatch_execbuffer;
> -			if (i915_semaphore_is_enabled(dev)) {
> +			if (i915_semaphore_is_enabled(dev_priv)) {
>  				ring->semaphore.sync_to = gen8_ring_sync;
>  				ring->semaphore.signal = gen8_xcs_signal;
>  				GEN8_RING_SEMAPHORE_INIT;
> @@ -2767,7 +2767,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
>  			ring->irq_put = gen6_ring_put_irq;
>  			ring->dispatch_execbuffer =
>  				gen6_ring_dispatch_execbuffer;
> -			if (i915_semaphore_is_enabled(dev)) {
> +			if (i915_semaphore_is_enabled(dev_priv)) {
>  				ring->semaphore.sync_to = gen6_ring_sync;
>  				ring->semaphore.signal = gen6_signal;
>  				ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VR;
> @@ -2827,7 +2827,7 @@ int intel_init_bsd2_ring_buffer(struct drm_device *dev)
>  	ring->irq_put = gen8_ring_put_irq;
>  	ring->dispatch_execbuffer =
>  			gen8_ring_dispatch_execbuffer;
> -	if (i915_semaphore_is_enabled(dev)) {
> +	if (i915_semaphore_is_enabled(dev_priv)) {
>  		ring->semaphore.sync_to = gen8_ring_sync;
>  		ring->semaphore.signal = gen8_xcs_signal;
>  		GEN8_RING_SEMAPHORE_INIT;
> @@ -2857,7 +2857,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
>  		ring->irq_get = gen8_ring_get_irq;
>  		ring->irq_put = gen8_ring_put_irq;
>  		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;
> -		if (i915_semaphore_is_enabled(dev)) {
> +		if (i915_semaphore_is_enabled(dev_priv)) {
>  			ring->semaphore.sync_to = gen8_ring_sync;
>  			ring->semaphore.signal = gen8_xcs_signal;
>  			GEN8_RING_SEMAPHORE_INIT;
> @@ -2867,7 +2867,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
>  		ring->irq_get = gen6_ring_get_irq;
>  		ring->irq_put = gen6_ring_put_irq;
>  		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
> -		if (i915_semaphore_is_enabled(dev)) {
> +		if (i915_semaphore_is_enabled(dev_priv)) {
>  			ring->semaphore.signal = gen6_signal;
>  			ring->semaphore.sync_to = gen6_ring_sync;
>  			/*
> @@ -2915,7 +2915,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
>  		ring->irq_get = gen8_ring_get_irq;
>  		ring->irq_put = gen8_ring_put_irq;
>  		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;
> -		if (i915_semaphore_is_enabled(dev)) {
> +		if (i915_semaphore_is_enabled(dev_priv)) {
>  			ring->semaphore.sync_to = gen8_ring_sync;
>  			ring->semaphore.signal = gen8_xcs_signal;
>  			GEN8_RING_SEMAPHORE_INIT;
> @@ -2925,7 +2925,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
>  		ring->irq_get = hsw_vebox_get_irq;
>  		ring->irq_put = hsw_vebox_put_irq;
>  		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
> -		if (i915_semaphore_is_enabled(dev)) {
> +		if (i915_semaphore_is_enabled(dev_priv)) {
>  			ring->semaphore.sync_to = gen6_ring_sync;
>  			ring->semaphore.signal = gen6_signal;
>  			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VER;
> -- 
> 2.6.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8890b115a2c0..359436162f3d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2859,7 +2859,7 @@  static int i915_semaphore_status(struct seq_file *m, void *unused)
 	int num_rings = hweight32(INTEL_INFO(dev)->ring_mask);
 	int i, j, ret;
 
-	if (!i915_semaphore_is_enabled(dev)) {
+	if (!i915_semaphore_is_enabled(dev_priv)) {
 		seq_puts(m, "Semaphores are disabled\n");
 		return 0;
 	}
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index cd79ef114b8e..d41bf214fc84 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -127,7 +127,7 @@  static int i915_getparam(struct drm_device *dev, void *data,
 		value = 1;
 		break;
 	case I915_PARAM_HAS_SEMAPHORES:
-		value = i915_semaphore_is_enabled(dev);
+		value = i915_semaphore_is_enabled(dev_priv);
 		break;
 	case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
 		value = 1;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 1d887459e37f..10c4cc2cece9 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -512,9 +512,9 @@  void intel_detect_pch(struct drm_device *dev)
 	pci_dev_put(pch);
 }
 
-bool i915_semaphore_is_enabled(struct drm_device *dev)
+bool i915_semaphore_is_enabled(struct drm_i915_private *dev_priv)
 {
-	if (INTEL_INFO(dev)->gen < 6)
+	if (INTEL_INFO(dev_priv)->gen < 6)
 		return false;
 
 	if (i915.semaphores >= 0)
@@ -525,12 +525,12 @@  bool i915_semaphore_is_enabled(struct drm_device *dev)
 		return false;
 
 	/* Until we get further testing... */
-	if (IS_GEN8(dev))
+	if (IS_GEN8(dev_priv))
 		return false;
 
 #ifdef CONFIG_INTEL_IOMMU
 	/* Enable semaphores on SNB when IO remapping is off */
-	if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
+	if (INTEL_INFO(dev_priv)->gen == 6 && intel_iommu_gfx_mapped)
 		return false;
 #endif
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 343a0a723d2c..fadf2ceb1f72 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3311,7 +3311,7 @@  extern void intel_detect_pch(struct drm_device *dev);
 extern int intel_trans_dp_port_sel(struct drm_crtc *crtc);
 extern int intel_enable_rc6(const struct drm_device *dev);
 
-extern bool i915_semaphore_is_enabled(struct drm_device *dev);
+extern bool i915_semaphore_is_enabled(struct drm_i915_private *dev_priv);
 int i915_reg_read_ioctl(struct drm_device *dev, void *data,
 			struct drm_file *file);
 int i915_get_reset_stats_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 69d8d5fc750b..e6ac049a4698 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3150,7 +3150,7 @@  __i915_gem_object_sync(struct drm_i915_gem_object *obj,
 	if (i915_gem_request_completed(from_req, true))
 		return 0;
 
-	if (!i915_semaphore_is_enabled(obj->base.dev)) {
+	if (!i915_semaphore_is_enabled(to_i915(obj->base.dev))) {
 		struct drm_i915_private *i915 = to_i915(obj->base.dev);
 		ret = __i915_wait_request(from_req,
 					  atomic_read(&i915->gpu_error.reset_counter),
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index f2f1e913f17a..55d2985c1dbb 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -483,7 +483,7 @@  mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 	u32 flags = hw_flags | MI_MM_SPACE_GTT;
 	const int num_rings =
 		/* Use an extended w/a on ivb+ if signalling from other rings */
-		i915_semaphore_is_enabled(ring->dev) ?
+		i915_semaphore_is_enabled(to_i915(ring->dev)) ?
 		hweight32(INTEL_INFO(ring->dev)->ring_mask) - 1 :
 		0;
 	int len, i, ret;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 0d0a7b1a6b4b..d8e035e126d7 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -816,7 +816,7 @@  static void gen8_record_semaphore_state(struct drm_i915_private *dev_priv,
 	struct intel_engine_cs *to;
 	int i;
 
-	if (!i915_semaphore_is_enabled(dev_priv->dev))
+	if (!i915_semaphore_is_enabled(dev_priv))
 		return;
 
 	if (!error->semaphore_obj)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0eaaab92dea0..8d8ba717a022 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2594,7 +2594,7 @@  int intel_init_render_ring_buffer(struct drm_device *dev)
 	ring->mmio_base = RENDER_RING_BASE;
 
 	if (INTEL_INFO(dev)->gen >= 8) {
-		if (i915_semaphore_is_enabled(dev)) {
+		if (i915_semaphore_is_enabled(dev_priv)) {
 			obj = i915_gem_alloc_object(dev, 4096);
 			if (obj == NULL) {
 				DRM_ERROR("Failed to allocate semaphore bo. Disabling semaphores\n");
@@ -2619,7 +2619,7 @@  int intel_init_render_ring_buffer(struct drm_device *dev)
 		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
 		ring->get_seqno = gen6_ring_get_seqno;
 		ring->set_seqno = ring_set_seqno;
-		if (i915_semaphore_is_enabled(dev)) {
+		if (i915_semaphore_is_enabled(dev_priv)) {
 			WARN_ON(!dev_priv->semaphore_obj);
 			ring->semaphore.sync_to = gen8_ring_sync;
 			ring->semaphore.signal = gen8_rcs_signal;
@@ -2635,7 +2635,7 @@  int intel_init_render_ring_buffer(struct drm_device *dev)
 		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
 		ring->get_seqno = gen6_ring_get_seqno;
 		ring->set_seqno = ring_set_seqno;
-		if (i915_semaphore_is_enabled(dev)) {
+		if (i915_semaphore_is_enabled(dev_priv)) {
 			ring->semaphore.sync_to = gen6_ring_sync;
 			ring->semaphore.signal = gen6_signal;
 			/*
@@ -2756,7 +2756,7 @@  int intel_init_bsd_ring_buffer(struct drm_device *dev)
 			ring->irq_put = gen8_ring_put_irq;
 			ring->dispatch_execbuffer =
 				gen8_ring_dispatch_execbuffer;
-			if (i915_semaphore_is_enabled(dev)) {
+			if (i915_semaphore_is_enabled(dev_priv)) {
 				ring->semaphore.sync_to = gen8_ring_sync;
 				ring->semaphore.signal = gen8_xcs_signal;
 				GEN8_RING_SEMAPHORE_INIT;
@@ -2767,7 +2767,7 @@  int intel_init_bsd_ring_buffer(struct drm_device *dev)
 			ring->irq_put = gen6_ring_put_irq;
 			ring->dispatch_execbuffer =
 				gen6_ring_dispatch_execbuffer;
-			if (i915_semaphore_is_enabled(dev)) {
+			if (i915_semaphore_is_enabled(dev_priv)) {
 				ring->semaphore.sync_to = gen6_ring_sync;
 				ring->semaphore.signal = gen6_signal;
 				ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VR;
@@ -2827,7 +2827,7 @@  int intel_init_bsd2_ring_buffer(struct drm_device *dev)
 	ring->irq_put = gen8_ring_put_irq;
 	ring->dispatch_execbuffer =
 			gen8_ring_dispatch_execbuffer;
-	if (i915_semaphore_is_enabled(dev)) {
+	if (i915_semaphore_is_enabled(dev_priv)) {
 		ring->semaphore.sync_to = gen8_ring_sync;
 		ring->semaphore.signal = gen8_xcs_signal;
 		GEN8_RING_SEMAPHORE_INIT;
@@ -2857,7 +2857,7 @@  int intel_init_blt_ring_buffer(struct drm_device *dev)
 		ring->irq_get = gen8_ring_get_irq;
 		ring->irq_put = gen8_ring_put_irq;
 		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;
-		if (i915_semaphore_is_enabled(dev)) {
+		if (i915_semaphore_is_enabled(dev_priv)) {
 			ring->semaphore.sync_to = gen8_ring_sync;
 			ring->semaphore.signal = gen8_xcs_signal;
 			GEN8_RING_SEMAPHORE_INIT;
@@ -2867,7 +2867,7 @@  int intel_init_blt_ring_buffer(struct drm_device *dev)
 		ring->irq_get = gen6_ring_get_irq;
 		ring->irq_put = gen6_ring_put_irq;
 		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
-		if (i915_semaphore_is_enabled(dev)) {
+		if (i915_semaphore_is_enabled(dev_priv)) {
 			ring->semaphore.signal = gen6_signal;
 			ring->semaphore.sync_to = gen6_ring_sync;
 			/*
@@ -2915,7 +2915,7 @@  int intel_init_vebox_ring_buffer(struct drm_device *dev)
 		ring->irq_get = gen8_ring_get_irq;
 		ring->irq_put = gen8_ring_put_irq;
 		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;
-		if (i915_semaphore_is_enabled(dev)) {
+		if (i915_semaphore_is_enabled(dev_priv)) {
 			ring->semaphore.sync_to = gen8_ring_sync;
 			ring->semaphore.signal = gen8_xcs_signal;
 			GEN8_RING_SEMAPHORE_INIT;
@@ -2925,7 +2925,7 @@  int intel_init_vebox_ring_buffer(struct drm_device *dev)
 		ring->irq_get = hsw_vebox_get_irq;
 		ring->irq_put = hsw_vebox_put_irq;
 		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
-		if (i915_semaphore_is_enabled(dev)) {
+		if (i915_semaphore_is_enabled(dev_priv)) {
 			ring->semaphore.sync_to = gen6_ring_sync;
 			ring->semaphore.signal = gen6_signal;
 			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VER;