From patchwork Fri Dec 4 17:30:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 7770561 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 39CFB9F39B for ; Fri, 4 Dec 2015 17:33:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 55FBE20495 for ; Fri, 4 Dec 2015 17:33:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 59D5F20498 for ; Fri, 4 Dec 2015 17:33:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752715AbbLDRcn (ORCPT ); Fri, 4 Dec 2015 12:32:43 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:56669 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751740AbbLDRcj (ORCPT ); Fri, 4 Dec 2015 12:32:39 -0500 Received: from epcpsbgm1new.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NYU01JWYGQE6BA0@mailout2.samsung.com>; Sat, 05 Dec 2015 02:32:38 +0900 (KST) X-AuditID: cbfee61a-f79266d000003652-ed-5661ce362531 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 2E.BF.13906.63EC1665; Sat, 5 Dec 2015 02:32:38 +0900 (KST) Received: from AMDC1976.DIGITAL.local ([106.120.53.102]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NYU00GMAGOFMR10@mmp2.samsung.com>; Sat, 05 Dec 2015 02:32:38 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Thomas Abraham , Sylwester Nawrocki , Mike Turquette , Kukjin Kim , Kukjin Kim , Viresh Kumar , Krzysztof Kozlowski , Ben Gamari Cc: Tomasz Figa , Lukasz Majewski , Heiko Stuebner , Chanwoo Choi , Kevin Hilman , Javier Martinez Canillas , Tobias Jakobi , Anand Moon , linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com Subject: [PATCH v3 08/10] ARM: dts: Exynos5422: fix OPP tables Date: Fri, 04 Dec 2015 18:30:33 +0100 Message-id: <1449250235-9613-9-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1449250235-9613-1-git-send-email-b.zolnierkie@samsung.com> References: <1449250235-9613-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrILMWRmVeSWpSXmKPExsVy+t9jQV2zc4lhBj+XillsnLGe1WLW/Lss Fte/PGe1+P/oNavFm7drmCxevzC06F1wlc2i//FrZouvh1cwWrx5uJnRYtPja6wWl3fNYbP4 3HuE0WLG+X1MFus23mK3eDrhIpvF4TftrBYdyxgt2lZ/YLVYtesPo8XGrx4Ooh47Z91l99i0 qpPN4861PWwem5fUe/w7xu6xpR8o3LdlFaPHmd/OHtuvzWP2+LxJLoArissmJTUnsyy1SN8u gSvjyclWloKlIhVru9vZGhi3CXQxcnJICJhIdN1rZIawxSQu3FvP1sXIxSEkMItR4uiq11DO L0aJtX/uM4FUsQlYSUxsX8UIkhAROMYk8aj1JjuIwyzwmlni6MG/YFXCAnYSv9+cAkpwcLAI qEosOZoGEuYVcJf4cf8uI8Q6OYmTxyazgticAh4Sp7d1gZ0hBFTT+34fywRG3gWMDKsYJVIL kguKk9JzDfNSy/WKE3OLS/PS9ZLzczcxgiPimdQOxoO73A8xCnAwKvHwMmxKCBNiTSwrrsw9 xCjBwawkwssskxgmxJuSWFmVWpQfX1Sak1p8iFGag0VJnLf2UmSYkEB6YklqdmpqQWoRTJaJ g1OqgdHK67OGvPOCF5qGGbbHjt3kv63RtKvdlGMS466TbldvH0zY+v9mbebRJTEs63YeNVbe suH/a7/M+s1sy1ekdBjMUGK3VLyrPjUzeZdk/ILMORlPl11uvP732zutAFEpVvu3O/fULPSb rXsj+sVXoQMCqWkPH5id5cuwd9mRqW8VLvVR+tfVyGolluKMREMt5qLiRAAD8ocqhAIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ben Gamari The Exynos 5422 is identical to the 5800 except for the fact that it boots from the A7 cores. Consequently, the core numbering is different: cores 0-3 are A7s whereas 4-7 are A15s. We can reuse the device tree of the 5800 for the 5422 but we must take care to override the OPP tables and CPU clocks. These are otherwise inherited from the exynos5800 devicetree, which has the CPU clusters reversed compared to the 5422. This results in the A15 cores only reaching 1.4GHz, the maximum rate of the KFC clock. Cc: Javier Martinez Canillas Signed-off-by: Ben Gamari Signed-off-by: Bartlomiej Zolnierkiewicz --- arch/arm/boot/dts/exynos5422-cpus.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi index b7f60c8..9a5131d 100644 --- a/arch/arm/boot/dts/exynos5422-cpus.dtsi +++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi @@ -20,8 +20,10 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x100>; + clocks = <&clock CLK_KFC_CLK>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cpu1_opp_table>; }; &cpu1 { @@ -30,6 +32,7 @@ reg = <0x101>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cpu1_opp_table>; }; &cpu2 { @@ -38,6 +41,7 @@ reg = <0x102>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cpu1_opp_table>; }; &cpu3 { @@ -46,14 +50,17 @@ reg = <0x103>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cpu1_opp_table>; }; &cpu4 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; + clocks = <&clock CLK_ARM_CLK>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cpu0_opp_table>; }; &cpu5 { @@ -62,6 +69,7 @@ reg = <0x1>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cpu0_opp_table>; }; &cpu6 { @@ -70,6 +78,7 @@ reg = <0x2>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cpu0_opp_table>; }; &cpu7 { @@ -78,4 +87,5 @@ reg = <0x3>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cpu0_opp_table>; };