[v2,09/19] PM / devfreq: exynos: Update documentation for bus devices using passive governor
diff mbox

Message ID 1449634091-1842-10-git-send-email-cw00.choi@samsung.com
State New, archived
Headers show

Commit Message

Chanwoo Choi Dec. 9, 2015, 4:08 a.m. UTC
This patch updates the documentation for passive bus devices and adds the
detailed example of Exynos3250.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 .../devicetree/bindings/devfreq/exynos-bus.txt     | 244 ++++++++++++++++++++-
 1 file changed, 241 insertions(+), 3 deletions(-)

Comments

Krzysztof Kozlowski Dec. 10, 2015, 1:31 a.m. UTC | #1
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch updates the documentation for passive bus devices and adds the
> detailed example of Exynos3250.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  .../devicetree/bindings/devfreq/exynos-bus.txt     | 244 ++++++++++++++++++++-
>  1 file changed, 241 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> index 54a1f9c46c88..c4fdc70f8eac 100644
> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> @@ -13,18 +13,23 @@ SoC has the different sub-blocks. So, this difference should be specified
>  in devicetree file instead of each device driver. In result, this driver
>  is able to support the bus frequency for all Exynos SoCs.
>  
> -Required properties for bus device:
> +Required properties for all bus devices:
>  - compatible: Should be "samsung,exynos-bus".
>  - clock-names : the name of clock used by the bus, "bus".
>  - clocks : phandles for clock specified in "clock-names" property.
>  - #clock-cells: should be 1.
>  - operating-points-v2: the OPP table including frequency/voltage information
>    to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
> +
> +Required properties for only parent bus device:

Maybe:
"Required properties only for parent bus devices:"

In this binding documentation file the idea of "parent" is not
explained. I now it is related to passive devfreq governor but looking
at the binding itself it is a new idea, not covered here.

>  - vdd-supply: the regulator to provide the buses with the voltage.
>  - devfreq-events: the devfreq-event device to monitor the curret utilization
>    of buses.
>  
> -Optional properties for bus device:
> +Required properties for only passive bus device:

"Required properties only for passive bus devices:"

> +- devfreq: the parent bus device.
> +
> +Optional properties for only parent bus device:
>  - exynos,saturation-ratio: the percentage value which is used to calibrate
>                     the performance count againt total cycle count.
>  
> @@ -33,7 +38,20 @@ Example1:
>  	power line (regulator). The MIF (Memory Interface) AXI bus is used to
>  	transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
>  
> -	- power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
> +	- MIF (Memory Interface) block
> +	: VDD_MIF |--- DMC (Dynamic Memory Controller)
> +
> +	- INT (Internal) block
> +	: VDD_INT |--- LEFTBUS (parent device)
> +		  |--- PERIL
> +		  |--- MFC
> +		  |--- G3D
> +		  |--- RIGHTBUS
> +		  |--- FSYS
> +		  |--- LCD0
> +		  |--- PERIR
> +		  |--- ISP
> +		  |--- CAM
>  
>  	- MIF bus's frequency/voltage table
>  	-----------------------
> @@ -46,6 +64,24 @@ Example1:
>  	|L5| 400000 |875000   |
>  	-----------------------
>  
> +	- INT bus's frequency/voltage table
> +	----------------------------------------------------------
> +	|Block|LEFTBUS|RIGHTBUS|MCUISP |ISP    |PERIL  ||VDD_INT |
> +	| name|       |LCD0    |       |       |       ||        |
> +	|     |       |FSYS    |       |       |       ||        |
> +	|     |       |MFC     |       |       |       ||        |
> +	----------------------------------------------------------
> +	|Mode |*parent|passive |passive|passive|passive||        |
> +	----------------------------------------------------------
> +	|Lv   |Frequency                               ||Voltage |
> +	----------------------------------------------------------
> +	|L1   |50000  |50000   |50000  |50000  |50000  ||900000  |
> +	|L2   |80000  |80000   |80000  |80000  |80000  ||900000  |
> +	|L3   |100000 |100000  |100000 |100000 |100000 ||1000000 |
> +	|L4   |134000 |134000  |200000 |200000 |       ||1000000 |
> +	|L5   |200000 |200000  |400000 |300000 |       ||1000000 |
> +	----------------------------------------------------------
> +
>  Example2 :
>  	The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
>  	are listed below:
> @@ -84,6 +120,167 @@ Example2 :
>  		};
>  	};
>  
> +	bus_leftbus: bus_leftbus {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu CLK_DIV_GDL>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_leftbus_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_rightbus: bus_rightbus {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu CLK_DIV_GDR>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_leftbus_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_lcd0: bus_lcd0 {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu CLK_DIV_ACLK_160>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_leftbus_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_fsys: bus_fsys {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu CLK_DIV_ACLK_200>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_leftbus_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_mcuisp: bus_mcuisp {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_mcuisp_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_isp: bus_isp {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu CLK_DIV_ACLK_266>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_isp_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_peril: bus_perir {


Peril or perir?

Best regards,
Krzysztof

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Chanwoo Choi Dec. 10, 2015, 1:36 a.m. UTC | #2
On 2015? 12? 10? 10:31, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> This patch updates the documentation for passive bus devices and adds the
>> detailed example of Exynos3250.
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  .../devicetree/bindings/devfreq/exynos-bus.txt     | 244 ++++++++++++++++++++-
>>  1 file changed, 241 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> index 54a1f9c46c88..c4fdc70f8eac 100644
>> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> @@ -13,18 +13,23 @@ SoC has the different sub-blocks. So, this difference should be specified
>>  in devicetree file instead of each device driver. In result, this driver
>>  is able to support the bus frequency for all Exynos SoCs.
>>  
>> -Required properties for bus device:
>> +Required properties for all bus devices:
>>  - compatible: Should be "samsung,exynos-bus".
>>  - clock-names : the name of clock used by the bus, "bus".
>>  - clocks : phandles for clock specified in "clock-names" property.
>>  - #clock-cells: should be 1.
>>  - operating-points-v2: the OPP table including frequency/voltage information
>>    to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
>> +
>> +Required properties for only parent bus device:
> 
> Maybe:
> "Required properties only for parent bus devices:"

OK. I'll modify it.

> 
> In this binding documentation file the idea of "parent" is not
> explained. I now it is related to passive devfreq governor but looking
> at the binding itself it is a new idea, not covered here.

OK. I'll add the detailed description of 'parent' and
correlation between 'parent' and 'passive' device.

> 
>>  - vdd-supply: the regulator to provide the buses with the voltage.
>>  - devfreq-events: the devfreq-event device to monitor the curret utilization
>>    of buses.
>>  
>> -Optional properties for bus device:
>> +Required properties for only passive bus device:
> 
> "Required properties only for passive bus devices:"

OK. I'll modify it.

> 
>> +- devfreq: the parent bus device.
>> +
>> +Optional properties for only parent bus device:
>>  - exynos,saturation-ratio: the percentage value which is used to calibrate
>>                     the performance count againt total cycle count.
>>  
>> @@ -33,7 +38,20 @@ Example1:
>>  	power line (regulator). The MIF (Memory Interface) AXI bus is used to
>>  	transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
>>  
>> -	- power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
>> +	- MIF (Memory Interface) block
>> +	: VDD_MIF |--- DMC (Dynamic Memory Controller)
>> +
>> +	- INT (Internal) block
>> +	: VDD_INT |--- LEFTBUS (parent device)
>> +		  |--- PERIL
>> +		  |--- MFC
>> +		  |--- G3D
>> +		  |--- RIGHTBUS
>> +		  |--- FSYS
>> +		  |--- LCD0
>> +		  |--- PERIR
>> +		  |--- ISP
>> +		  |--- CAM
>>  
>>  	- MIF bus's frequency/voltage table
>>  	-----------------------
>> @@ -46,6 +64,24 @@ Example1:
>>  	|L5| 400000 |875000   |
>>  	-----------------------
>>  
>> +	- INT bus's frequency/voltage table
>> +	----------------------------------------------------------
>> +	|Block|LEFTBUS|RIGHTBUS|MCUISP |ISP    |PERIL  ||VDD_INT |
>> +	| name|       |LCD0    |       |       |       ||        |
>> +	|     |       |FSYS    |       |       |       ||        |
>> +	|     |       |MFC     |       |       |       ||        |
>> +	----------------------------------------------------------
>> +	|Mode |*parent|passive |passive|passive|passive||        |
>> +	----------------------------------------------------------
>> +	|Lv   |Frequency                               ||Voltage |
>> +	----------------------------------------------------------
>> +	|L1   |50000  |50000   |50000  |50000  |50000  ||900000  |
>> +	|L2   |80000  |80000   |80000  |80000  |80000  ||900000  |
>> +	|L3   |100000 |100000  |100000 |100000 |100000 ||1000000 |
>> +	|L4   |134000 |134000  |200000 |200000 |       ||1000000 |
>> +	|L5   |200000 |200000  |400000 |300000 |       ||1000000 |
>> +	----------------------------------------------------------
>> +
>>  Example2 :
>>  	The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
>>  	are listed below:
>> @@ -84,6 +120,167 @@ Example2 :
>>  		};
>>  	};
>>  
>> +	bus_leftbus: bus_leftbus {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu CLK_DIV_GDL>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_leftbus_opp_table>;
>> +		status = "disabled";
>> +	};
>> +
>> +	bus_rightbus: bus_rightbus {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu CLK_DIV_GDR>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_leftbus_opp_table>;
>> +		status = "disabled";
>> +	};
>> +
>> +	bus_lcd0: bus_lcd0 {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu CLK_DIV_ACLK_160>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_leftbus_opp_table>;
>> +		status = "disabled";
>> +	};
>> +
>> +	bus_fsys: bus_fsys {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu CLK_DIV_ACLK_200>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_leftbus_opp_table>;
>> +		status = "disabled";
>> +	};
>> +
>> +	bus_mcuisp: bus_mcuisp {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_mcuisp_opp_table>;
>> +		status = "disabled";
>> +	};
>> +
>> +	bus_isp: bus_isp {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu CLK_DIV_ACLK_266>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_isp_opp_table>;
>> +		status = "disabled";
>> +	};
>> +
>> +	bus_peril: bus_perir {
> 
> 
> Peril or perir?

peril is correct. I'll fix it.

Best Regards,
Chanwoo Choi

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Rob Herring Dec. 10, 2015, 2:21 p.m. UTC | #3
On Wed, Dec 09, 2015 at 01:08:01PM +0900, Chanwoo Choi wrote:
> This patch updates the documentation for passive bus devices and adds the
> detailed example of Exynos3250.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  .../devicetree/bindings/devfreq/exynos-bus.txt     | 244 ++++++++++++++++++++-
>  1 file changed, 241 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> index 54a1f9c46c88..c4fdc70f8eac 100644
> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> @@ -13,18 +13,23 @@ SoC has the different sub-blocks. So, this difference should be specified
>  in devicetree file instead of each device driver. In result, this driver
>  is able to support the bus frequency for all Exynos SoCs.
>  
> -Required properties for bus device:
> +Required properties for all bus devices:
>  - compatible: Should be "samsung,exynos-bus".
>  - clock-names : the name of clock used by the bus, "bus".
>  - clocks : phandles for clock specified in "clock-names" property.
>  - #clock-cells: should be 1.
>  - operating-points-v2: the OPP table including frequency/voltage information
>    to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
> +
> +Required properties for only parent bus device:
>  - vdd-supply: the regulator to provide the buses with the voltage.
>  - devfreq-events: the devfreq-event device to monitor the curret utilization
>    of buses.
>  
> -Optional properties for bus device:
> +Required properties for only passive bus device:
> +- devfreq: the parent bus device.
> +
> +Optional properties for only parent bus device:
>  - exynos,saturation-ratio: the percentage value which is used to calibrate
>                     the performance count againt total cycle count.
>  
> @@ -33,7 +38,20 @@ Example1:
>  	power line (regulator). The MIF (Memory Interface) AXI bus is used to
>  	transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
>  
> -	- power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
> +	- MIF (Memory Interface) block
> +	: VDD_MIF |--- DMC (Dynamic Memory Controller)
> +
> +	- INT (Internal) block
> +	: VDD_INT |--- LEFTBUS (parent device)
> +		  |--- PERIL
> +		  |--- MFC
> +		  |--- G3D
> +		  |--- RIGHTBUS
> +		  |--- FSYS
> +		  |--- LCD0
> +		  |--- PERIR
> +		  |--- ISP
> +		  |--- CAM

This still has the same problem as before. I would expect that the bus 
hierarchy in the dts match the hierarchy here. You just have flat nodes 
in the example below. So all IP blocks affected by frequency scaling 
should be under the bus node defining the OPPs. Something like this:

soc {
	compatible = "simple-bus";
	bus {
		compatible = "my-awesome-dvfs-bus"; /* simple-bus too if 
no setup needed first */
		reg = <0x0 0x0>; // Bus control registers
		clocks = <&ccm BUS_CLK>;
		operating-points-v2 = <&opp>;
		device@0 {
			compatible = "my-awesome-device-1";
		};
		device@1 {
			compatible = "my-awesome-device-2";
		};
	};
};
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Chanwoo Choi Dec. 10, 2015, 3:10 p.m. UTC | #4
On Thu, Dec 10, 2015 at 11:21 PM, Rob Herring <robh@kernel.org> wrote:
> On Wed, Dec 09, 2015 at 01:08:01PM +0900, Chanwoo Choi wrote:
>> This patch updates the documentation for passive bus devices and adds the
>> detailed example of Exynos3250.
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  .../devicetree/bindings/devfreq/exynos-bus.txt     | 244 ++++++++++++++++++++-
>>  1 file changed, 241 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> index 54a1f9c46c88..c4fdc70f8eac 100644
>> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> @@ -13,18 +13,23 @@ SoC has the different sub-blocks. So, this difference should be specified
>>  in devicetree file instead of each device driver. In result, this driver
>>  is able to support the bus frequency for all Exynos SoCs.
>>
>> -Required properties for bus device:
>> +Required properties for all bus devices:
>>  - compatible: Should be "samsung,exynos-bus".
>>  - clock-names : the name of clock used by the bus, "bus".
>>  - clocks : phandles for clock specified in "clock-names" property.
>>  - #clock-cells: should be 1.
>>  - operating-points-v2: the OPP table including frequency/voltage information
>>    to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
>> +
>> +Required properties for only parent bus device:
>>  - vdd-supply: the regulator to provide the buses with the voltage.
>>  - devfreq-events: the devfreq-event device to monitor the curret utilization
>>    of buses.
>>
>> -Optional properties for bus device:
>> +Required properties for only passive bus device:
>> +- devfreq: the parent bus device.
>> +
>> +Optional properties for only parent bus device:
>>  - exynos,saturation-ratio: the percentage value which is used to calibrate
>>                     the performance count againt total cycle count.
>>
>> @@ -33,7 +38,20 @@ Example1:
>>       power line (regulator). The MIF (Memory Interface) AXI bus is used to
>>       transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
>>
>> -     - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
>> +     - MIF (Memory Interface) block
>> +     : VDD_MIF |--- DMC (Dynamic Memory Controller)
>> +
>> +     - INT (Internal) block
>> +     : VDD_INT |--- LEFTBUS (parent device)
>> +               |--- PERIL
>> +               |--- MFC
>> +               |--- G3D
>> +               |--- RIGHTBUS
>> +               |--- FSYS
>> +               |--- LCD0
>> +               |--- PERIR
>> +               |--- ISP
>> +               |--- CAM
>
> This still has the same problem as before. I would expect that the bus
> hierarchy in the dts match the hierarchy here. You just have flat nodes
> in the example below. So all IP blocks affected by frequency scaling
> should be under the bus node defining the OPPs. Something like this:

The each bus of sub-block has not h/w dependency among sub-blocks
and has the owned source clock / OPP table. Just they share the same
power line. So, I think that flat nodes in the example below is not problem.

Because of using the same power line, the sub-blocks would be tied
by devfreq framework only for the behavior of bus frequency scaling .

>
> soc {
>         compatible = "simple-bus";
>         bus {
>                 compatible = "my-awesome-dvfs-bus"; /* simple-bus too if
> no setup needed first */
>                 reg = <0x0 0x0>; // Bus control registers
>                 clocks = <&ccm BUS_CLK>;
>                 operating-points-v2 = <&opp>;
>                 device@0 {
>                         compatible = "my-awesome-device-1";
>                 };
>                 device@1 {
>                         compatible = "my-awesome-device-2";
>                 };
>         };
> };
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Rob Herring Dec. 11, 2015, 3:24 a.m. UTC | #5
On Fri, Dec 11, 2015 at 12:10:13AM +0900, Chanwoo Choi wrote:
> On Thu, Dec 10, 2015 at 11:21 PM, Rob Herring <robh@kernel.org> wrote:
> > On Wed, Dec 09, 2015 at 01:08:01PM +0900, Chanwoo Choi wrote:
> >> This patch updates the documentation for passive bus devices and adds the
> >> detailed example of Exynos3250.
> >>
> >> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> >> ---
> >>  .../devicetree/bindings/devfreq/exynos-bus.txt     | 244 ++++++++++++++++++++-
> >>  1 file changed, 241 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> >> index 54a1f9c46c88..c4fdc70f8eac 100644
> >> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> >> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> >> @@ -13,18 +13,23 @@ SoC has the different sub-blocks. So, this difference should be specified
> >>  in devicetree file instead of each device driver. In result, this driver
> >>  is able to support the bus frequency for all Exynos SoCs.
> >>
> >> -Required properties for bus device:
> >> +Required properties for all bus devices:
> >>  - compatible: Should be "samsung,exynos-bus".
> >>  - clock-names : the name of clock used by the bus, "bus".
> >>  - clocks : phandles for clock specified in "clock-names" property.
> >>  - #clock-cells: should be 1.
> >>  - operating-points-v2: the OPP table including frequency/voltage information
> >>    to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
> >> +
> >> +Required properties for only parent bus device:
> >>  - vdd-supply: the regulator to provide the buses with the voltage.
> >>  - devfreq-events: the devfreq-event device to monitor the curret utilization
> >>    of buses.
> >>
> >> -Optional properties for bus device:
> >> +Required properties for only passive bus device:
> >> +- devfreq: the parent bus device.
> >> +
> >> +Optional properties for only parent bus device:
> >>  - exynos,saturation-ratio: the percentage value which is used to calibrate
> >>                     the performance count againt total cycle count.
> >>
> >> @@ -33,7 +38,20 @@ Example1:
> >>       power line (regulator). The MIF (Memory Interface) AXI bus is used to
> >>       transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
> >>
> >> -     - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
> >> +     - MIF (Memory Interface) block
> >> +     : VDD_MIF |--- DMC (Dynamic Memory Controller)
> >> +
> >> +     - INT (Internal) block
> >> +     : VDD_INT |--- LEFTBUS (parent device)
> >> +               |--- PERIL
> >> +               |--- MFC
> >> +               |--- G3D
> >> +               |--- RIGHTBUS
> >> +               |--- FSYS
> >> +               |--- LCD0
> >> +               |--- PERIR
> >> +               |--- ISP
> >> +               |--- CAM
> >
> > This still has the same problem as before. I would expect that the bus
> > hierarchy in the dts match the hierarchy here. You just have flat nodes
> > in the example below. So all IP blocks affected by frequency scaling
> > should be under the bus node defining the OPPs. Something like this:
> 
> The each bus of sub-block has not h/w dependency among sub-blocks
> and has the owned source clock / OPP table. Just they share the same
> power line. So, I think that flat nodes in the example below is not problem.

I'm talking about the peripherals not described here. Is the ISP block 
not a child of the bus_isp node? Same for the display controller block 
and bus_lcd0. And so on.

Rob

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Chanwoo Choi Dec. 11, 2015, 3:56 a.m. UTC | #6
On 2015? 12? 11? 12:24, Rob Herring wrote:
> On Fri, Dec 11, 2015 at 12:10:13AM +0900, Chanwoo Choi wrote:
>> On Thu, Dec 10, 2015 at 11:21 PM, Rob Herring <robh@kernel.org> wrote:
>>> On Wed, Dec 09, 2015 at 01:08:01PM +0900, Chanwoo Choi wrote:
>>>> This patch updates the documentation for passive bus devices and adds the
>>>> detailed example of Exynos3250.
>>>>
>>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>>> ---
>>>>  .../devicetree/bindings/devfreq/exynos-bus.txt     | 244 ++++++++++++++++++++-
>>>>  1 file changed, 241 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>>>> index 54a1f9c46c88..c4fdc70f8eac 100644
>>>> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>>>> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>>>> @@ -13,18 +13,23 @@ SoC has the different sub-blocks. So, this difference should be specified
>>>>  in devicetree file instead of each device driver. In result, this driver
>>>>  is able to support the bus frequency for all Exynos SoCs.
>>>>
>>>> -Required properties for bus device:
>>>> +Required properties for all bus devices:
>>>>  - compatible: Should be "samsung,exynos-bus".
>>>>  - clock-names : the name of clock used by the bus, "bus".
>>>>  - clocks : phandles for clock specified in "clock-names" property.
>>>>  - #clock-cells: should be 1.
>>>>  - operating-points-v2: the OPP table including frequency/voltage information
>>>>    to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
>>>> +
>>>> +Required properties for only parent bus device:
>>>>  - vdd-supply: the regulator to provide the buses with the voltage.
>>>>  - devfreq-events: the devfreq-event device to monitor the curret utilization
>>>>    of buses.
>>>>
>>>> -Optional properties for bus device:
>>>> +Required properties for only passive bus device:
>>>> +- devfreq: the parent bus device.
>>>> +
>>>> +Optional properties for only parent bus device:
>>>>  - exynos,saturation-ratio: the percentage value which is used to calibrate
>>>>                     the performance count againt total cycle count.
>>>>
>>>> @@ -33,7 +38,20 @@ Example1:
>>>>       power line (regulator). The MIF (Memory Interface) AXI bus is used to
>>>>       transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
>>>>
>>>> -     - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
>>>> +     - MIF (Memory Interface) block
>>>> +     : VDD_MIF |--- DMC (Dynamic Memory Controller)
>>>> +
>>>> +     - INT (Internal) block
>>>> +     : VDD_INT |--- LEFTBUS (parent device)
>>>> +               |--- PERIL
>>>> +               |--- MFC
>>>> +               |--- G3D
>>>> +               |--- RIGHTBUS
>>>> +               |--- FSYS
>>>> +               |--- LCD0
>>>> +               |--- PERIR
>>>> +               |--- ISP
>>>> +               |--- CAM
>>>
>>> This still has the same problem as before. I would expect that the bus
>>> hierarchy in the dts match the hierarchy here. You just have flat nodes
>>> in the example below. So all IP blocks affected by frequency scaling
>>> should be under the bus node defining the OPPs. Something like this:
>>
>> The each bus of sub-block has not h/w dependency among sub-blocks
>> and has the owned source clock / OPP table. Just they share the same
>> power line. So, I think that flat nodes in the example below is not problem.
> 
> I'm talking about the peripherals not described here. Is the ISP block 
> not a child of the bus_isp node? Same for the display controller block 
> and bus_lcd0. And so on.

From the H/W point of view, ISP block is really not included in ISP's AXI bus (bus_isp).
Just, the bus_isp connect to between ISP block and DRAM.

Thanks,
Chanwoo Choi

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Patch
diff mbox

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index 54a1f9c46c88..c4fdc70f8eac 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -13,18 +13,23 @@  SoC has the different sub-blocks. So, this difference should be specified
 in devicetree file instead of each device driver. In result, this driver
 is able to support the bus frequency for all Exynos SoCs.
 
-Required properties for bus device:
+Required properties for all bus devices:
 - compatible: Should be "samsung,exynos-bus".
 - clock-names : the name of clock used by the bus, "bus".
 - clocks : phandles for clock specified in "clock-names" property.
 - #clock-cells: should be 1.
 - operating-points-v2: the OPP table including frequency/voltage information
   to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
+
+Required properties for only parent bus device:
 - vdd-supply: the regulator to provide the buses with the voltage.
 - devfreq-events: the devfreq-event device to monitor the curret utilization
   of buses.
 
-Optional properties for bus device:
+Required properties for only passive bus device:
+- devfreq: the parent bus device.
+
+Optional properties for only parent bus device:
 - exynos,saturation-ratio: the percentage value which is used to calibrate
                    the performance count againt total cycle count.
 
@@ -33,7 +38,20 @@  Example1:
 	power line (regulator). The MIF (Memory Interface) AXI bus is used to
 	transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
 
-	- power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
+	- MIF (Memory Interface) block
+	: VDD_MIF |--- DMC (Dynamic Memory Controller)
+
+	- INT (Internal) block
+	: VDD_INT |--- LEFTBUS (parent device)
+		  |--- PERIL
+		  |--- MFC
+		  |--- G3D
+		  |--- RIGHTBUS
+		  |--- FSYS
+		  |--- LCD0
+		  |--- PERIR
+		  |--- ISP
+		  |--- CAM
 
 	- MIF bus's frequency/voltage table
 	-----------------------
@@ -46,6 +64,24 @@  Example1:
 	|L5| 400000 |875000   |
 	-----------------------
 
+	- INT bus's frequency/voltage table
+	----------------------------------------------------------
+	|Block|LEFTBUS|RIGHTBUS|MCUISP |ISP    |PERIL  ||VDD_INT |
+	| name|       |LCD0    |       |       |       ||        |
+	|     |       |FSYS    |       |       |       ||        |
+	|     |       |MFC     |       |       |       ||        |
+	----------------------------------------------------------
+	|Mode |*parent|passive |passive|passive|passive||        |
+	----------------------------------------------------------
+	|Lv   |Frequency                               ||Voltage |
+	----------------------------------------------------------
+	|L1   |50000  |50000   |50000  |50000  |50000  ||900000  |
+	|L2   |80000  |80000   |80000  |80000  |80000  ||900000  |
+	|L3   |100000 |100000  |100000 |100000 |100000 ||1000000 |
+	|L4   |134000 |134000  |200000 |200000 |       ||1000000 |
+	|L5   |200000 |200000  |400000 |300000 |       ||1000000 |
+	----------------------------------------------------------
+
 Example2 :
 	The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
 	are listed below:
@@ -84,6 +120,167 @@  Example2 :
 		};
 	};
 
+	bus_leftbus: bus_leftbus {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu CLK_DIV_GDL>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_leftbus_opp_table>;
+		status = "disabled";
+	};
+
+	bus_rightbus: bus_rightbus {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu CLK_DIV_GDR>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_leftbus_opp_table>;
+		status = "disabled";
+	};
+
+	bus_lcd0: bus_lcd0 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu CLK_DIV_ACLK_160>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_leftbus_opp_table>;
+		status = "disabled";
+	};
+
+	bus_fsys: bus_fsys {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu CLK_DIV_ACLK_200>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_leftbus_opp_table>;
+		status = "disabled";
+	};
+
+	bus_mcuisp: bus_mcuisp {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_mcuisp_opp_table>;
+		status = "disabled";
+	};
+
+	bus_isp: bus_isp {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu CLK_DIV_ACLK_266>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_isp_opp_table>;
+		status = "disabled";
+	};
+
+	bus_peril: bus_perir {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu CLK_DIV_ACLK_100>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_peril_opp_table>;
+		status = "disabled";
+	};
+
+	bus_mfc: bus_mfc {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu CLK_SCLK_MFC>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_leftbus_opp_table>;
+		status = "disabled";
+	};
+
+	bus_leftbus_opp_table: opp_table1 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp00 {
+			opp-hz = /bits/ 64 <50000000>;
+			opp-microvolt = <900000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <80000000>;
+			opp-microvolt = <900000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <100000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp03 {
+			opp-hz = /bits/ 64 <134000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp04 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <1000000>;
+		};
+	};
+
+	bus_mcuisp_opp_table: opp_table2 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp00 {
+			opp-hz = /bits/ 64 <50000000>;
+			opp-microvolt = <900000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <80000000>;
+			opp-microvolt = <900000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <100000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp03 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp04 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1000000>;
+		};
+	};
+
+	bus_isp_opp_table: opp_table3 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp00 {
+			opp-hz = /bits/ 64 <50000000>;
+			opp-microvolt = <900000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <80000000>;
+			opp-microvolt = <900000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <100000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp03 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp04 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <1000000>;
+		};
+	};
+
+	bus_peril_opp_table: opp_table4 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp00 {
+			opp-hz = /bits/ 64 <50000000>;
+			opp-microvolt = <900000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <80000000>;
+			opp-microvolt = <900000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <100000000>;
+			opp-microvolt = <1000000>;
+		};
+	};
+
+
 	Usage case to handle the frequency and voltage of bus on runtime
 	in exynos3250-rinato.dts are listed below:
 
@@ -92,3 +289,44 @@  Example2 :
 		vdd-supply = <&buck1_reg>;	/* VDD_MIF */
 		status = "okay";
 	};
+
+	&bus_leftbus {
+		devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+		vdd-supply = <&buck3_reg>;
+		status = "okay";
+	};
+
+	&bus_rightbus {
+		devfreq = <&bus_leftbus>;
+		status = "okay";
+	};
+
+	&bus_lcd0 {
+		devfreq = <&bus_leftbus>;
+		status = "okay";
+	};
+
+	&bus_fsys {
+		devfreq = <&bus_leftbus>;
+		status = "okay";
+	};
+
+	&bus_mcuisp {
+		devfreq = <&bus_leftbus>;
+		status = "okay";
+	};
+
+	&bus_isp {
+		devfreq = <&bus_leftbus>;
+		status = "okay";
+	};
+
+	&bus_peril {
+		devfreq = <&bus_leftbus>;
+		status = "okay";
+	};
+
+	&bus_mfc {
+		devfreq = <&bus_leftbus>;
+		status = "okay";
+	};