From patchwork Mon Dec 14 08:32:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yao mark X-Patchwork-Id: 7842421 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0F0869F1C2 for ; Mon, 14 Dec 2015 08:35:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 38A1220426 for ; Mon, 14 Dec 2015 08:35:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5E35F20272 for ; Mon, 14 Dec 2015 08:35:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a8Ob4-0005pm-S9; Mon, 14 Dec 2015 08:35:06 +0000 Received: from regular1.263xmail.com ([211.150.99.133]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a8OaM-0004sB-0R; Mon, 14 Dec 2015 08:34:24 +0000 Received: from mark.yao?rock-chips.com (unknown [192.168.167.190]) by regular1.263xmail.com (Postfix) with SMTP id CDCE284E3; Mon, 14 Dec 2015 16:33:54 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id C1AF529C26; Mon, 14 Dec 2015 16:33:35 +0800 (CST) X-RL-SENDER: mark.yao@rock-chips.com X-SENDER-IP: 192.253.253.158 X-LOGIN-NAME: mark.yao@rock-chips.com X-UNIQUE-TAG: <926cc755ceb62521ad12a243e29207b1> X-ATTACHMENT-NUM: 0 X-SENDER: yzq@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [192.253.253.158]) by smtp.263.net (Postfix) whith SMTP id 9061JXJUHZ; Mon, 14 Dec 2015 16:33:51 +0800 (CST) From: Mark Yao To: David Airlie , Heiko Stuebner , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/8] drm/rockchip: Optimization vop mode set Date: Mon, 14 Dec 2015 16:32:07 +0800 Message-Id: <1450081931-9709-5-git-send-email-mark.yao@rock-chips.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1450081931-9709-1-git-send-email-mark.yao@rock-chips.com> References: <1450081931-9709-1-git-send-email-mark.yao@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151214_003423_756893_5DEA5DBA X-CRM114-Status: UNSURE ( 9.42 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Yao MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Rk3288 vop timing registers is immediately register, when configure timing on display active time, will cause tearing. use dclk reset is not a good idea to avoid this tearing. we can avoid tearing by using standby register. Vop standby register will take effect at end of current frame, and go back to work immediately when exit standby. So we can use standby register to protect this context. Signed-off-by: Mark Yao --- Changes in v2: None drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 49 +++++++++++++++++++-------- 1 file changed, 34 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 58d7cc4..40cc8ed 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1096,10 +1096,40 @@ static void vop_crtc_enable(struct drm_crtc *crtc) vop_enable(crtc); /* - * disable dclk to stop frame scan, so that we can safe config mode and - * enable iommu. + * If dclk rate is zero, mean that scanout is stop, + * we don't need wait any more. */ - clk_disable(vop->dclk); + if (clk_get_rate(vop->dclk)) { + /* + * Rk3288 vop timing register is immediately, when configure + * display timing on display time, may cause tearing. + * + * Vop standby will take effect at end of current frame, + * if dsp hold valid irq happen, it means standby complete. + * + * mode set: + * standby and wait complete --> |---- + * | display time + * |---- + * |---> dsp hold irq + * configure display timing --> | + * standby exit | + * | new frame start. + */ + + reinit_completion(&vop->dsp_hold_completion); + vop_dsp_hold_valid_irq_enable(vop); + + spin_lock(&vop->reg_lock); + + VOP_CTRL_SET(vop, standby, 1); + + spin_unlock(&vop->reg_lock); + + wait_for_completion(&vop->dsp_hold_completion); + + vop_dsp_hold_valid_irq_disable(vop); + } switch (vop->connector_type) { case DRM_MODE_CONNECTOR_LVDS: @@ -1135,20 +1165,9 @@ static void vop_crtc_enable(struct drm_crtc *crtc) VOP_CTRL_SET(vop, vact_st_end, val); VOP_CTRL_SET(vop, vpost_st_end, val); - - /* - * reset dclk, take all mode config affect, so the clk would run in - * correct frame. - */ - reset_control_assert(vop->dclk_rst); - usleep_range(10, 20); - reset_control_deassert(vop->dclk_rst); - clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); -out: - if (clk_enable(vop->dclk) < 0) - dev_err(vop->dev, "failed to enable dclk - %d\n", ret_clk); + VOP_CTRL_SET(vop, standby, 0); } static void vop_crtc_atomic_flush(struct drm_crtc *crtc,