From patchwork Mon Jan 11 11:00:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8001901 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 884139F8AA for ; Mon, 11 Jan 2016 11:01:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A314620295 for ; Mon, 11 Jan 2016 11:01:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E66F0200F0 for ; Mon, 11 Jan 2016 11:01:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EB0BC6E2D7; Mon, 11 Jan 2016 03:01:48 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by gabe.freedesktop.org (Postfix) with ESMTPS id 148866E2D7 for ; Mon, 11 Jan 2016 03:01:44 -0800 (PST) Received: by mail-wm0-f68.google.com with SMTP id b14so25764893wmb.1 for ; Mon, 11 Jan 2016 03:01:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Fx8zy4jL2tcV72adVQmbxqdw0GbcfOQBDkwBDhnbGZc=; b=qmzPJtULwQxIM9EqwpvuA3n1KKQMYRr8l5QKy+YFVAPSxqk5hUHG4ZEmWRdv3lcOzb kQ7EKUwXmrWc5AtGU6OMLIWw3NrSljasY0zkWVEUKAPLih608MJJkWKaHlD4FNSk7ieb QVFbggfnjpZZ/n+ZeiF0Ku63Y4ZAyBvRqwNAGKEm3Q6XmVfsPAuwmeYImPI39c+lNmkG 1GtTvDGC6iG0MrPA1Bnc92dktFf8gX8clgUdOyMLBpDLTySjrVqdwo/HICTAwmsb8jTY jGkHAHhLHuB36z9WVHrm9v4gppM3iQvN6LiXol+ZtuQ728BON4L0CqR8A44t3fn7XFwk N5Mg== X-Received: by 10.194.20.67 with SMTP id l3mr8108988wje.86.1452510102880; Mon, 11 Jan 2016 03:01:42 -0800 (PST) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id 73sm12311579wmm.7.2016.01.11.03.01.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 11 Jan 2016 03:01:42 -0800 (PST) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Mon, 11 Jan 2016 11:00:45 +0000 Message-Id: <1452510091-6833-3-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.7.0.rc3 In-Reply-To: <1452510091-6833-1-git-send-email-chris@chris-wilson.co.uk> References: <1452503961-14837-1-git-send-email-chris@chris-wilson.co.uk> <1452510091-6833-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 144/190] drm/i915: Bump the inactive MRU tracking for all VMA accessed X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When we bump the MRU access tracking on set-to-gtt, we need to not only bump the primary GGTT VMA but all partials as well. Similarly we want to bump the MRU access for when unpinning an object from the scanout. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index fa518764c32c..6ceed074f738 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3003,6 +3003,24 @@ i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj) I915_GEM_DOMAIN_CPU); } +static void i915_gem_object_bump_inactive_ggtt(struct drm_i915_gem_object *obj) +{ + struct i915_vma *vma; + + list_for_each_entry(vma, &obj->vma_list, obj_link) { + if (!vma->is_ggtt) + continue; + + if (vma->active) + continue; + + if (!drm_mm_node_allocated(&vma->node)) + continue; + + list_move_tail(&vma->vm_link, &vma->vm->inactive_list); + } +} + /** * Moves a single object to the GTT read, and possibly write domain. * @@ -3013,7 +3031,6 @@ int i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write) { uint32_t old_write_domain, old_read_domains; - struct i915_vma *vma; int ret; if (obj->base.write_domain == I915_GEM_DOMAIN_GTT) @@ -3063,9 +3080,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write) old_write_domain); /* And bump the LRU for this access */ - vma = i915_gem_object_to_ggtt(obj, NULL); - if (vma && drm_mm_node_allocated(&vma->node) && !vma->active) - list_move_tail(&vma->vm_link, &vma->vm->inactive_list); + i915_gem_object_bump_inactive_ggtt(obj); return 0; } @@ -3373,6 +3388,10 @@ i915_gem_object_unpin_from_display_plane(struct i915_vma *vma) if (--vma->obj->pin_display == 0) vma->display_alignment = 0; + /* Bump the LRU to try and avoid premature eviction whilst flipping */ + if (!vma->active) + list_move_tail(&vma->vm_link, &vma->vm->inactive_list); + i915_vma_unpin(vma); WARN_ON(vma->obj->pin_display > vma->pin_count); }