MTD: pxa3xx_nand: fix nand detection issue
diff mbox

Message ID 1305865207-7869-1-git-send-email-leiwen@marvell.com
State New, archived
Headers show

Commit Message

Lei Wen May 20, 2011, 4:20 a.m. UTC
When keep_config is set, the detection would goes different routine.
That the driver would read out the setting which is set previously
by bootloader. While most bootloader keep the irq mask as off, and
current driver need all irq default open, keep_config behavior would
lead to no irq at all.

Signed-off-by: Lei Wen <leiwen@marvell.com>
---
 drivers/mtd/nand/pxa3xx_nand.c |   12 +++++++-----
 1 files changed, 7 insertions(+), 5 deletions(-)

Comments

Lei Wen June 3, 2011, 3:11 p.m. UTC | #1
Tested-by: Daniel Mack <zonque@gmail.com>

Also cc to MTD maillist and stable kernel.

On Fri, May 20, 2011 at 12:20 PM, Lei Wen <leiwen@marvell.com> wrote:
> When keep_config is set, the detection would goes different routine.
> That the driver would read out the setting which is set previously
> by bootloader. While most bootloader keep the irq mask as off, and
> current driver need all irq default open, keep_config behavior would
> lead to no irq at all.
>
> Signed-off-by: Lei Wen <leiwen@marvell.com>
> ---
>  drivers/mtd/nand/pxa3xx_nand.c |   12 +++++++-----
>  1 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> index ff07012..9896aef 100644
> --- a/drivers/mtd/nand/pxa3xx_nand.c
> +++ b/drivers/mtd/nand/pxa3xx_nand.c
> @@ -813,7 +813,7 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
>        info->page_size = ndcr & NDCR_PAGE_SZ ? 2048 : 512;
>        /* set info fields needed to read id */
>        info->read_id_bytes = (info->page_size == 2048) ? 4 : 2;
> -       info->reg_ndcr = ndcr;
> +       info->reg_ndcr = ndcr & ~NDCR_INT_MASK;
>        info->cmdset = &default_cmdset;
>
>        info->ndtr0cs0 = nand_readl(info, NDTR0CS0);
> @@ -882,7 +882,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
>        struct pxa3xx_nand_info *info = mtd->priv;
>        struct platform_device *pdev = info->pdev;
>        struct pxa3xx_nand_platform_data *pdata = pdev->dev.platform_data;
> -       struct nand_flash_dev pxa3xx_flash_ids[2] = { {NULL,}, {NULL,} };
> +       struct nand_flash_dev pxa3xx_flash_ids[2], *def = NULL;
>        const struct pxa3xx_nand_flash *f = NULL;
>        struct nand_chip *chip = mtd->priv;
>        uint32_t id = -1;
> @@ -942,8 +942,10 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
>        pxa3xx_flash_ids[0].erasesize = f->page_size * f->page_per_block;
>        if (f->flash_width == 16)
>                pxa3xx_flash_ids[0].options = NAND_BUSWIDTH_16;
> +       pxa3xx_flash_ids[1].name = NULL;
> +       def = pxa3xx_flash_ids;
>  KEEP_CONFIG:
> -       if (nand_scan_ident(mtd, 1, pxa3xx_flash_ids))
> +       if (nand_scan_ident(mtd, 1, def))
>                return -ENODEV;
>        /* calculate addressing information */
>        info->col_addr_cycles = (mtd->writesize >= 2048) ? 2 : 1;
> @@ -954,9 +956,9 @@ KEEP_CONFIG:
>                info->row_addr_cycles = 2;
>        mtd->name = mtd_names[0];
>        chip->ecc.mode = NAND_ECC_HW;
> -       chip->ecc.size = f->page_size;
> +       chip->ecc.size = info->page_size;
>
> -       chip->options = (f->flash_width == 16) ? NAND_BUSWIDTH_16 : 0;
> +       chip->options = (info->reg_ndcr & NDCR_DWIDTH_M) ? NAND_BUSWIDTH_16 : 0;
>        chip->options |= NAND_NO_AUTOINCR;
>        chip->options |= NAND_NO_READRDY;
>
> --
> 1.7.0.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
Greg KH June 3, 2011, 10:32 p.m. UTC | #2
On Fri, Jun 03, 2011 at 11:11:54PM +0800, Lei Wen wrote:
> Tested-by: Daniel Mack <zonque@gmail.com>
> 
> Also cc to MTD maillist and stable kernel.


<formletter>

This is not the correct way to submit patches for inclusion in the
stable kernel tree.  Please read Documentation/stable_kernel_rules.txt
for how to do this properly.

</formletter>
Daniel Mack June 4, 2011, 7:45 a.m. UTC | #3
On Sat, Jun 4, 2011 at 12:32 AM, Greg KH <greg@kroah.com> wrote:
> On Fri, Jun 03, 2011 at 11:11:54PM +0800, Lei Wen wrote:
>> Tested-by: Daniel Mack <zonque@gmail.com>
>>
>> Also cc to MTD maillist and stable kernel.
>
> <formletter>
>
> This is not the correct way to submit patches for inclusion in the
> stable kernel tree.  Please read Documentation/stable_kernel_rules.txt
> for how to do this properly.
>
> </formletter>

Jup.

Lei - when you collect the patches for this driver to send them out,
make sure every one gets a "Cc: stable@kernel.org" line under the
S-o-b, so it can be picked automatically later on.

Just to be sure, I count four patches now:

 - 1 from you regarding keep_config chip detection and DMA support
(which is *not* the one this thread refers to, you sent an amended
version to me privately, and it might make sense to split this patch
again)
 - 1 from me for the blank page ECC issue
 - 2 from Alex Lin (one for removal of unused variable, one plugs a memory leak)


Thanks,
Daniel
Artem Bityutskiy June 6, 2011, 10:40 a.m. UTC | #4
On Fri, 2011-06-03 at 23:11 +0800, Lei Wen wrote:
> Tested-by: Daniel Mack <zonque@gmail.com>
> 
> Also cc to MTD maillist and stable kernel.

Please, re-send the patch to the MTD mailing list and add the prober
-stable CC tag.

Patch
diff mbox

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index ff07012..9896aef 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -813,7 +813,7 @@  static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
 	info->page_size = ndcr & NDCR_PAGE_SZ ? 2048 : 512;
 	/* set info fields needed to read id */
 	info->read_id_bytes = (info->page_size == 2048) ? 4 : 2;
-	info->reg_ndcr = ndcr;
+	info->reg_ndcr = ndcr & ~NDCR_INT_MASK;
 	info->cmdset = &default_cmdset;
 
 	info->ndtr0cs0 = nand_readl(info, NDTR0CS0);
@@ -882,7 +882,7 @@  static int pxa3xx_nand_scan(struct mtd_info *mtd)
 	struct pxa3xx_nand_info *info = mtd->priv;
 	struct platform_device *pdev = info->pdev;
 	struct pxa3xx_nand_platform_data *pdata = pdev->dev.platform_data;
-	struct nand_flash_dev pxa3xx_flash_ids[2] = { {NULL,}, {NULL,} };
+	struct nand_flash_dev pxa3xx_flash_ids[2], *def = NULL;
 	const struct pxa3xx_nand_flash *f = NULL;
 	struct nand_chip *chip = mtd->priv;
 	uint32_t id = -1;
@@ -942,8 +942,10 @@  static int pxa3xx_nand_scan(struct mtd_info *mtd)
 	pxa3xx_flash_ids[0].erasesize = f->page_size * f->page_per_block;
 	if (f->flash_width == 16)
 		pxa3xx_flash_ids[0].options = NAND_BUSWIDTH_16;
+	pxa3xx_flash_ids[1].name = NULL;
+	def = pxa3xx_flash_ids;
 KEEP_CONFIG:
-	if (nand_scan_ident(mtd, 1, pxa3xx_flash_ids))
+	if (nand_scan_ident(mtd, 1, def))
 		return -ENODEV;
 	/* calculate addressing information */
 	info->col_addr_cycles = (mtd->writesize >= 2048) ? 2 : 1;
@@ -954,9 +956,9 @@  KEEP_CONFIG:
 		info->row_addr_cycles = 2;
 	mtd->name = mtd_names[0];
 	chip->ecc.mode = NAND_ECC_HW;
-	chip->ecc.size = f->page_size;
+	chip->ecc.size = info->page_size;
 
-	chip->options = (f->flash_width == 16) ? NAND_BUSWIDTH_16 : 0;
+	chip->options = (info->reg_ndcr & NDCR_DWIDTH_M) ? NAND_BUSWIDTH_16 : 0;
 	chip->options |= NAND_NO_AUTOINCR;
 	chip->options |= NAND_NO_READRDY;