[7/8] drm/i915: Make display gtt offsets u32
diff mbox

Message ID 20160114223653.GC15852@nuc-i3427.alporthouse.com
State New
Headers show

Commit Message

Chris Wilson Jan. 14, 2016, 10:36 p.m. UTC
On Thu, Jan 14, 2016 at 03:22:15PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Using 'unsigned long' for ggtt offsets doesn't make much sense. Use
> 'u32' instead since we've not yet seen a >4GiB ggtt.

We should do:


To get that early warning in.
-Chris

Comments

Ville Syrjälä Jan. 15, 2016, 10:03 a.m. UTC | #1
On Thu, Jan 14, 2016 at 10:36:53PM +0000, Chris Wilson wrote:
> On Thu, Jan 14, 2016 at 03:22:15PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Using 'unsigned long' for ggtt offsets doesn't make much sense. Use
> > 'u32' instead since we've not yet seen a >4GiB ggtt.
> 
> We should do:
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 2e460b369e82..2ce16acceb75 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -3143,6 +3143,13 @@ int i915_gem_gtt_init(struct drm_device *dev)
>         if (ret)
>                 return ret;
>  
> +       if (gtt->base.total >> 32) {
> +               DRM_ERROR("The code does not expect a Global GTT with more that 32bits of address space! Found %lldM!\n",
> +                         gtt->base.total >> 20);
> +               gtt->base.total = 1ull << 32;
> +               gtt->mappable_end = min(gtt->mappable_end, gtt->base.total);
> +       }
> +
>         /* GMADR is the PCI mmio aperture into the global GTT. */
>         DRM_INFO("Memory usable by graphics device = %lluM\n",
>                  gtt->base.total >> 20);
> 
> To get that early warning in.

Seems reasonable. Feel free to slap on
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> -Chris
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2e460b369e82..2ce16acceb75 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3143,6 +3143,13 @@  int i915_gem_gtt_init(struct drm_device *dev)
        if (ret)
                return ret;
 
+       if (gtt->base.total >> 32) {
+               DRM_ERROR("The code does not expect a Global GTT with more that 32bits of address space! Found %lldM!\n",
+                         gtt->base.total >> 20);
+               gtt->base.total = 1ull << 32;
+               gtt->mappable_end = min(gtt->mappable_end, gtt->base.total);
+       }
+
        /* GMADR is the PCI mmio aperture into the global GTT. */
        DRM_INFO("Memory usable by graphics device = %lluM\n",
                 gtt->base.total >> 20);