From patchwork Fri Jan 15 14:35:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8041441 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 710CDBEEED for ; Fri, 15 Jan 2016 14:36:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8CD7D2044C for ; Fri, 15 Jan 2016 14:36:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 995FC20430 for ; Fri, 15 Jan 2016 14:36:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A6B76EB7F; Fri, 15 Jan 2016 06:36:03 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by gabe.freedesktop.org (Postfix) with ESMTPS id AFE576E05C for ; Fri, 15 Jan 2016 06:35:59 -0800 (PST) Received: by mail-wm0-f67.google.com with SMTP id l65so3148919wmf.3 for ; Fri, 15 Jan 2016 06:35:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=+BOKipM0qs7gB8w5+RM8F4qwe9b52FgkXC6RUsJK+gY=; b=Rig21WYowCwwXYsqUmLs+TtWIJKN9W0h0m0QQd3wnHFjnFrpSvyOA6hYPeVf8rp4t4 H9+CigOb7idA2/Maf3pwaO/oovefK3CKt/WRZEw625TpUxkTzsF2COLpEMFWV1S+zERC 7NP/qsr0BNGtNIcWPNdUczspdsdExFF99ET/N5poq2pVhr3iBDGSNsFUfw+JfA9w8UZ6 BHBoHjUt8rAm8GQT5Crmz113rZJ1903YH/sDN1nlgSZ8wOhg2AGQiP8SjNvj0uMR0gAG Jbc4KwgeMTJ8QrIKTn0x/GKsO9E0XiA+jBswRlhvBKblIjXPTiaHw9v3oinzCweKQz5G UkaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=+BOKipM0qs7gB8w5+RM8F4qwe9b52FgkXC6RUsJK+gY=; b=aHH8YryJGqBIblx3XrnN5Hrd0nvnvQBlqOoxvLpE/lcPRxOSXwR+OkWYz/7zqLoa0L u6QRT3CEeTSq6ifLYn1Z8CuyK7j3LCxJbl6MuECfCfd75ZGAKNGNAH30jHXFkUdnvhSP RhowMUIQJPEmpr0el3lONXWIgI+fwvM+lQ325DW+WE2SaUoJmHyxHF2pjuJFsEJFC9F9 8n5Ioz9pxqIOnyx5NiI6i3wG9CBz7jc6aSq98ZqZuMYDGqJm71+a697qTMXoUrSMsVsl EiqdRA1W0rP1ZF6Dbb4XcT/7MnvNPsli9S0IyifEA9wCvtmNXCflPfGkhUeraKsMNrgb xx+A== X-Gm-Message-State: ALoCoQkURrmN0mPCJObZfw1rnl9+/KCp/6KFAT2Ew6K5Gf97noJZ7K2R6ThbUyeiu9+kilLCG4VqhQF0XM+YEfkDwo/M5z2+4g== X-Received: by 10.194.19.100 with SMTP id d4mr10430526wje.18.1452868558215; Fri, 15 Jan 2016 06:35:58 -0800 (PST) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id qs1sm10900961wjc.2.2016.01.15.06.35.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 15 Jan 2016 06:35:57 -0800 (PST) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Fri, 15 Jan 2016 14:35:42 +0000 Message-Id: <1452868545-19586-4-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.7.0.rc3 In-Reply-To: <1452868545-19586-1-git-send-email-chris@chris-wilson.co.uk> References: <1452868545-19586-1-git-send-email-chris@chris-wilson.co.uk> Cc: Mika Kuoppala Subject: [Intel-gfx] [PATCH 3/6] drm/i915: Broadwell execlists needs exactly the same seqno w/a as legacy X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In legacy mode, we use the gen6 seqno barrier to insert a delay after the interrupt before reading the seqno (as the seqno write is not flushed before the interrupt is sent, the interrupt arrives before the seqno is visible). Execlists ignored the evidence of igt. Note that is harder, but not impossible, to reproduce the missed interrupt syndrome with execlists. This is primarily because execlists itself being interrupt driven helps mask the issue. v2: Rebase and unsquash! I kept it as gen6_seqno_barrier() for I have a long term plan to merge the two implementations. Signed-off-by: Chris Wilson Cc: Mika Kuoppala dev); + POSTING_READ_FW(RING_ACTHD(ring->mmio_base)); + intel_flush_status_page(ring, I915_GEM_HWS_INDEX); } @@ -1949,12 +1959,11 @@ logical_ring_default_vfuncs(struct drm_device *dev, ring->irq_get = gen8_logical_ring_get_irq; ring->irq_put = gen8_logical_ring_put_irq; ring->emit_bb_start = gen8_emit_bb_start; + ring->irq_seqno_barrier = gen6_seqno_barrier; ring->get_seqno = gen8_get_seqno; ring->set_seqno = gen8_set_seqno; - if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) { - ring->irq_seqno_barrier = bxt_seqno_barrier; + if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) ring->set_seqno = bxt_a_set_seqno; - } } static inline void