From patchwork Sat Feb 6 00:09:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 8240671 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D1A2ABEEE5 for ; Sat, 6 Feb 2016 00:12:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E7F2E203B4 for ; Sat, 6 Feb 2016 00:12:44 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 03930203B1 for ; Sat, 6 Feb 2016 00:12:44 +0000 (UTC) Received: from localhost ([::1]:50983 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRqUV-0003Hk-78 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 05 Feb 2016 19:12:43 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56430) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRqSP-0008Hd-Qa for qemu-devel@nongnu.org; Fri, 05 Feb 2016 19:10:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aRqSN-0006yf-E2 for qemu-devel@nongnu.org; Fri, 05 Feb 2016 19:10:33 -0500 Received: from mail-qg0-x231.google.com ([2607:f8b0:400d:c04::231]:34532) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRqSN-0006y2-89 for qemu-devel@nongnu.org; Fri, 05 Feb 2016 19:10:31 -0500 Received: by mail-qg0-x231.google.com with SMTP id u30so81156166qge.1 for ; Fri, 05 Feb 2016 16:10:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=BEltGCQ7kG+6PvwQobpMO4YDsdMnxeWX8uY+bxfD93c=; b=gpTuZ8Omkq+sV5leez+uPTQWzS+j/i9Maa99y0pW299CQpaApCTANUVp1bMw8hiHF1 eqdp82gKCm17wh3dCiKZZeDRZ4TIBUzJgYOEzln7IA6RfHa2GOmSsFbpGzhcwMgUZJm6 iDsHg3M/eYOCtbQzwRqnv2rmnwkyx4N3JVABYths/P0wo9evS95vxaBXcBffhEAbyH5q Ay1AjFT3QYjZt2z5HB6LjAIOF0GADNL0AL291kwBLAhVOBbP4qOLHEtObycnEiO64/Wj IepUH31rm1k0U5hkyWr4504wjdr8kyQZ5TpFcXFKdUYVvNutnA7VSD7aiAP0Cs3t7fxS 9Nqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=BEltGCQ7kG+6PvwQobpMO4YDsdMnxeWX8uY+bxfD93c=; b=gCbHx0vB8W0oWBPrYelZ6fwM/cbCzMugcz9d0GnqO7nCPxcTTfWwSXNn9FHE4sGGPT FkOogKdYovPj9Xq+CsEvgl5TcDigHYKG/ylIimUq9PL5hZyTWUub3oZaDy4+bgEWcw9Y NlxA+SXugGUdssoob++xu6AKY7FRA8rvH47vBfTC/S8ue35nTWy4VjQUa1Y/46VQNBMJ 0YwgDj8vYahGeTadqaAtjQtTp+c4p35oE+QClREahgTAcJ+XOS3/D3HlQC8VFtGKAFdu SnhLosFWrMFnv4Fl+6q8i39p+CZp1iK3use2s3DLsYwHyJzcakV8NsP0pyfPv71uS88/ OWMw== X-Gm-Message-State: AG10YOQqnBfGzZf1nuOHboVqJujCHdn2BT/MGBzIKzoCkITWDURDcj3AD+SDiY3UllZhwg== X-Received: by 10.140.222.18 with SMTP id s18mr21188409qhb.21.1454717430992; Fri, 05 Feb 2016 16:10:30 -0800 (PST) Received: from bigtime.com ([1.129.57.172]) by smtp.gmail.com with ESMTPSA id w66sm9079564qhc.15.2016.02.05.16.10.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 05 Feb 2016 16:10:30 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 6 Feb 2016 11:09:30 +1100 Message-Id: <1454717370-17516-13-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1454717370-17516-1-git-send-email-rth@twiddle.net> References: <1454717370-17516-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400d:c04::231 Cc: peter.maydell@linaro.org Subject: [Qemu-devel] [PULL 12/12] tcg: Introduce temp_load X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Unify all of the places that realize a temporary into a register. Reviewed-by: Aurelien Jarno Signed-off-by: Richard Henderson --- tcg/tcg.c | 116 ++++++++++++++++++++++++++++---------------------------------- 1 file changed, 52 insertions(+), 64 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 38b0883..5e4ca1d 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1707,6 +1707,35 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) tcg_abort(); } +/* Make sure the temporary is in a register. If needed, allocate the register + from DESIRED while avoiding ALLOCATED. */ +static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs, + TCGRegSet allocated_regs) +{ + TCGReg reg; + + switch (ts->val_type) { + case TEMP_VAL_REG: + return; + case TEMP_VAL_CONST: + reg = tcg_reg_alloc(s, desired_regs, allocated_regs); + tcg_out_movi(s, ts->type, reg, ts->val); + ts->mem_coherent = 0; + break; + case TEMP_VAL_MEM: + reg = tcg_reg_alloc(s, desired_regs, allocated_regs); + tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); + ts->mem_coherent = 1; + break; + case TEMP_VAL_DEAD: + default: + tcg_abort(); + } + ts->reg = reg; + ts->val_type = TEMP_VAL_REG; + s->reg_to_temp[reg] = ts; +} + /* mark a temporary as dead. */ static inline void temp_dead(TCGContext *s, TCGTemp *ts) { @@ -1729,13 +1758,8 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs) } switch (ts->val_type) { case TEMP_VAL_CONST: - ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], - allocated_regs); - ts->val_type = TEMP_VAL_REG; - s->reg_to_temp[ts->reg] = ts; - ts->mem_coherent = 0; - tcg_out_movi(s, ts->type, ts->reg, ts->val); - /* fallthrough*/ + temp_load(s, ts, tcg_target_available_regs[ts->type], allocated_regs); + /* fallthrough */ case TEMP_VAL_REG: tcg_reg_sync(s, ts->reg); break; @@ -1871,17 +1895,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, we don't have to reload SOURCE the next time it is used. */ if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG) || ts->val_type == TEMP_VAL_MEM) { - ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[itype], - allocated_regs); - if (ts->val_type == TEMP_VAL_MEM) { - tcg_out_ld(s, itype, ts->reg, ts->mem_base->reg, ts->mem_offset); - ts->mem_coherent = 1; - } else if (ts->val_type == TEMP_VAL_CONST) { - tcg_out_movi(s, itype, ts->reg, ts->val); - ts->mem_coherent = 0; - } - s->reg_to_temp[ts->reg] = ts; - ts->val_type = TEMP_VAL_REG; + temp_load(s, ts, tcg_target_available_regs[itype], allocated_regs); } if (IS_DEAD_ARG(0) && !ots->fixed_reg) { @@ -1967,30 +1981,17 @@ static void tcg_reg_alloc_op(TCGContext *s, arg = args[i]; arg_ct = &def->args_ct[i]; ts = &s->temps[arg]; - if (ts->val_type == TEMP_VAL_MEM) { - reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); - tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); - ts->val_type = TEMP_VAL_REG; - ts->reg = reg; - ts->mem_coherent = 1; - s->reg_to_temp[reg] = ts; - } else if (ts->val_type == TEMP_VAL_CONST) { - if (tcg_target_const_match(ts->val, ts->type, arg_ct)) { - /* constant is OK for instruction */ - const_args[i] = 1; - new_args[i] = ts->val; - goto iarg_end; - } else { - /* need to move to a register */ - reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); - tcg_out_movi(s, ts->type, reg, ts->val); - ts->val_type = TEMP_VAL_REG; - ts->reg = reg; - ts->mem_coherent = 0; - s->reg_to_temp[reg] = ts; - } + + if (ts->val_type == TEMP_VAL_CONST + && tcg_target_const_match(ts->val, ts->type, arg_ct)) { + /* constant is OK for instruction */ + const_args[i] = 1; + new_args[i] = ts->val; + goto iarg_end; } - assert(ts->val_type == TEMP_VAL_REG); + + temp_load(s, ts, arg_ct->u.regs, allocated_regs); + if (arg_ct->ct & TCG_CT_IALIAS) { if (ts->fixed_reg) { /* if fixed register, we must allocate a new register @@ -2158,23 +2159,9 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, #endif if (arg != TCG_CALL_DUMMY_ARG) { ts = &s->temps[arg]; - if (ts->val_type == TEMP_VAL_REG) { - tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); - } else if (ts->val_type == TEMP_VAL_MEM) { - reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], - s->reserved_regs); - /* XXX: not correct if reading values from the stack */ - tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); - tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); - } else if (ts->val_type == TEMP_VAL_CONST) { - reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], - s->reserved_regs); - /* XXX: sign extend may be needed on some targets */ - tcg_out_movi(s, ts->type, reg, ts->val); - tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); - } else { - tcg_abort(); - } + temp_load(s, ts, tcg_target_available_regs[ts->type], + s->reserved_regs); + tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); } #ifndef TCG_TARGET_STACK_GROWSUP stack_offset += sizeof(tcg_target_long); @@ -2189,18 +2176,19 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, ts = &s->temps[arg]; reg = tcg_target_call_iarg_regs[i]; tcg_reg_free(s, reg); + if (ts->val_type == TEMP_VAL_REG) { if (ts->reg != reg) { tcg_out_mov(s, ts->type, reg, ts->reg); } - } else if (ts->val_type == TEMP_VAL_MEM) { - tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); - } else if (ts->val_type == TEMP_VAL_CONST) { - /* XXX: sign extend ? */ - tcg_out_movi(s, ts->type, reg, ts->val); } else { - tcg_abort(); + TCGRegSet arg_set; + + tcg_regset_clear(arg_set); + tcg_regset_set_reg(arg_set, reg); + temp_load(s, ts, arg_set, allocated_regs); } + tcg_regset_set_reg(allocated_regs, reg); } }