From patchwork Mon Feb 8 11:12:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 8247771 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D1A19BEEE5 for ; Mon, 8 Feb 2016 11:13:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0342A203A9 for ; Mon, 8 Feb 2016 11:13:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1A9D0203A4 for ; Mon, 8 Feb 2016 11:13:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751366AbcBHLNM (ORCPT ); Mon, 8 Feb 2016 06:13:12 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:36420 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751207AbcBHLNI (ORCPT ); Mon, 8 Feb 2016 06:13:08 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u18BCYUV030485; Mon, 8 Feb 2016 05:12:34 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u18BCYRB009456; Mon, 8 Feb 2016 05:12:34 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Mon, 8 Feb 2016 05:12:33 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u18BCPFg019274; Mon, 8 Feb 2016 05:12:30 -0600 From: Kishon Vijay Abraham I To: Paul Walmsley , Tony Lindgren , , , CC: Russell King , , , , , , Subject: [PATCH 1/3] ARM: omap2+: omap_hwmod: introduce hwmod flag for custom reset handling Date: Mon, 8 Feb 2016 16:42:19 +0530 Message-ID: <1454929941-23949-2-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1454929941-23949-1-git-send-email-kishon@ti.com> References: <1454929941-23949-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paul Walmsley Many of the IP blocks with PRM hardreset lines are processor IP blocks and need special reset handling to ensure that WFI/HLT-like instructions are executed after reset. Introduce a new hwmod flag _HWMOD_CUSTOM_HARDRESET_ to indicate if the IP block requires special reset handling. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/mach-omap2/omap_hwmod.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 76bce11..4198829 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -525,6 +525,17 @@ struct omap_hwmod_omap4_prcm { * or idled. * HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to * operate and they need to be handled at the same time as the main_clk. + * HWMOD_CUSTOM_HARDRESET: By default, if a hwmod has PRCM hardreset + * lines associated with it (i.e., a populated .rst_lines field in + * the hwmod), the hwmod code will assert the hardreset lines when + * the IP block is initially reset, deassert the hardreset lines + * in _enable(), and reassert them in _shutdown(). If this flag + * is set, the hwmod code will not deassert the hardreset lines in + * _enable(), leaving this responsibility to the driver code. This flag may + * be needed for processor IP blocks that must be put into a WFI/HLT + * state after reset is deasserted, lest the processor leave its MSTANDBY + * signal deasserted, thus blocking the chip from entering a system-wide + * low power state. */ #define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_MSTANDBY (1 << 1) @@ -541,6 +552,7 @@ struct omap_hwmod_omap4_prcm { #define HWMOD_SWSUP_SIDLE_ACT (1 << 12) #define HWMOD_RECONFIG_IO_CHAIN (1 << 13) #define HWMOD_OPT_CLKS_NEEDED (1 << 14) +#define HWMOD_CUSTOM_HARDRESET (1 << 15) /* * omap_hwmod._int_flags definitions