[6/6] timer-tmu: Add SH7786 support
diff mbox

Message ID ueixpd2gx.wl%morimoto.kuninori@renesas.com
State Accepted
Delegated to: Paul Mundt
Headers show

Commit Message

Kuninori Morimoto Feb. 20, 2009, 7:02 a.m. UTC
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
---
 arch/sh/kernel/timers/timer-tmu.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

Comments

Paul Mundt March 3, 2009, 6:44 a.m. UTC | #1
On Fri, Feb 20, 2009 at 04:27:19PM +0900, Kuninori Morimoto wrote:
> L2 cache doesn't support now.
> This only support main cpu though sh7786 is multi core CPU.
> 
> Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>

I've applied this series with a bit of tidying, but have done so as a
single changeset. If you wish to have this applied incrementally as a
series, each one of these patches need to build on the previous ones
incrementally, and no single patch should leave the tree in a broken
state. Splitting them up arbitrarily is not sufficient, as this breaks
bisection, which is not acceptable.

Please keep this in mind for future patches.

> diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
> index 78a01d7..0ae0968 100644
> --- a/arch/sh/Kconfig
> +++ b/arch/sh/Kconfig
> @@ -356,6 +356,13 @@ config CPU_SUBTYPE_SH7785
>  	select ARCH_SPARSEMEM_ENABLE
>  	select SYS_SUPPORTS_NUMA
>  
> +config CPU_SUBTYPE_SH7786
> +	bool "Support SH7786 processor"
> +	select CPU_SH4A
> +	select CPU_SHX2
> +	select ARCH_SPARSEMEM_ENABLE
> +	select SYS_SUPPORTS_NUMA
> +
>  config CPU_SUBTYPE_SHX3
>  	bool "Support SH-X3 processor"
>  	select CPU_SH4A

This is most definitely not an SH-X2 core, so this needs to be selecting
CPU_SHX3 instead. I'll take care of fixing that up though, since some of
the existing SH-X3 code really only applies to the SH-X3 proto CPUs, and
not to SH7786.
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Patch
diff mbox

diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 2b62f9c..10b5a6f 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -244,6 +244,7 @@  static int tmu_timer_init(void)
     !defined(CONFIG_CPU_SUBTYPE_SH7721) && \
     !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
     !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
+    !defined(CONFIG_CPU_SUBTYPE_SH7786) && \
     !defined(CONFIG_CPU_SUBTYPE_SHX3)
 	ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
 #endif