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[50.194.63.110]) by smtp.gmail.com with ESMTPSA id 200sm12775546qhm.47.2016.02.23.13.12.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Feb 2016 13:12:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 23 Feb 2016 13:11:53 -0800 Message-Id: <1456261920-29900-18-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1456261920-29900-1-git-send-email-rth@twiddle.net> References: <1456261920-29900-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400d:c04::235 Cc: mark.cave-ayland@ilande.co.uk, atar4qemu@gmail.com Subject: [Qemu-devel] [PATCH v2 17/24] target-sparc: Pass TCGMemOp constants to helper_ld/st_asi X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Reduces the argument count for helper_ld_asi; do helper_st_asi for consistency. Signed-off-by: Richard Henderson --- target-sparc/helper.h | 4 +-- target-sparc/ldst_helper.c | 73 ++++++++++++++++++++++++++-------------------- target-sparc/translate.c | 58 ++++++++++++++++-------------------- 3 files changed, 69 insertions(+), 66 deletions(-) diff --git a/target-sparc/helper.h b/target-sparc/helper.h index 66abf83..f5afc8d 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -48,8 +48,8 @@ DEF_HELPER_FLAGS_3(udivx, TCG_CALL_NO_WG, i64, env, i64, i64) DEF_HELPER_FLAGS_3(ldqf, TCG_CALL_NO_WG, void, env, tl, int) DEF_HELPER_FLAGS_3(stqf, TCG_CALL_NO_WG, void, env, tl, int) #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) -DEF_HELPER_FLAGS_5(ld_asi, TCG_CALL_NO_WG, i64, env, tl, int, int, int) -DEF_HELPER_FLAGS_5(st_asi, TCG_CALL_NO_WG, void, env, tl, i64, int, int) +DEF_HELPER_FLAGS_4(ld_asi, TCG_CALL_NO_WG, i64, env, tl, int, i32) +DEF_HELPER_FLAGS_5(st_asi, TCG_CALL_NO_WG, void, env, tl, i64, int, i32) #endif DEF_HELPER_2(ldfsr, void, env, i32) DEF_HELPER_FLAGS_1(fabss, TCG_CALL_NO_RWG_SE, f32, f32) diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index 9bedac9..d110d9e 100644 --- a/target-sparc/ldst_helper.c +++ b/target-sparc/ldst_helper.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "tcg.h" #include "exec/helper-proto.h" #include "exec/cpu_ldst.h" #include "asi.h" @@ -427,9 +428,11 @@ static uint64_t leon3_cache_control_ld(CPUSPARCState *env, target_ulong addr, return ret; } -uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, - int sign) +uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, + int asi, uint32_t memop) { + int size = 1 << (memop & MO_SIZE); + int sign = memop & MO_SIGN; CPUState *cs = CPU(sparc_env_get_cpu(env)); uint64_t ret = 0; #if defined(DEBUG_MXCC) || defined(DEBUG_ASI) @@ -697,9 +700,10 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, return ret; } -void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi, - int size) +void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, + int asi, uint32_t memop) { + int size = 1 << (memop & MO_SIZE); SPARCCPU *cpu = sparc_env_get_cpu(env); CPUState *cs = CPU(cpu); @@ -1096,9 +1100,11 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi, #else /* TARGET_SPARC64 */ #ifdef CONFIG_USER_ONLY -uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, - int sign) +uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, + int asi, uint32_t memop) { + int size = 1 << (memop & MO_SIZE); + int sign = memop & MO_SIGN; uint64_t ret = 0; #if defined(DEBUG_ASI) target_ulong last_addr = addr; @@ -1204,8 +1210,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, - int asi, int size) + int asi, uint32_t memop) { + int size = 1 << (memop & MO_SIZE); #ifdef DEBUG_ASI dump_asi("write", addr, asi, size, val); #endif @@ -1275,9 +1282,11 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, #else /* CONFIG_USER_ONLY */ -uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, - int sign) +uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, + int asi, uint32_t memop) { + int size = 1 << (memop & MO_SIZE); + int sign = memop & MO_SIGN; CPUState *cs = CPU(sparc_env_get_cpu(env)); uint64_t ret = 0; #if defined(DEBUG_ASI) @@ -1657,8 +1666,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, - int asi, int size) + int asi, uint32_t memop) { + int size = 1 << (memop & MO_SIZE); SPARCCPU *cpu = sparc_env_get_cpu(env); CPUState *cs = CPU(cpu); @@ -2137,8 +2147,8 @@ void helper_ldda_asi(CPUSPARCState *env, target_ulong addr, int asi) a single 64-bit load. However, LE asis *are* treated as two 32-bit loads individually byte swapped. */ helper_check_align(env, addr, 0x7); - QT0.high = (uint32_t)helper_ld_asi(env, addr, asi, 4, 0); - QT0.low = (uint32_t)helper_ld_asi(env, addr + 4, asi, 4, 0); + QT0.high = (uint32_t)helper_ld_asi(env, addr, asi, MO_UL); + QT0.low = (uint32_t)helper_ld_asi(env, addr + 4, asi, MO_UL); return; } @@ -2170,7 +2180,7 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } helper_check_align(env, addr, 0x3f); for (i = 0; i < 8; i++, rd += 2, addr += 8) { - env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x8f, 8, 0); + env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x8f, MO_Q); } return; @@ -2188,7 +2198,7 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } helper_check_align(env, addr, 0x3f); for (i = 0; i < 8; i++, rd += 2, addr += 8) { - env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x19, 8, 0); + env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x19, MO_Q); } return; @@ -2199,7 +2209,7 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, switch (size) { default: case 4: - val = helper_ld_asi(env, addr, asi, size, 0); + val = helper_ld_asi(env, addr, asi, MO_UL); if (rd & 1) { env->fpr[rd / 2].l.lower = val; } else { @@ -2207,11 +2217,11 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } break; case 8: - env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, size, 0); + env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, MO_Q); break; case 16: - env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, 8, 0); - env->fpr[rd / 2 + 1].ll = helper_ld_asi(env, addr + 8, asi, 8, 0); + env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, MO_Q); + env->fpr[rd / 2 + 1].ll = helper_ld_asi(env, addr + 8, asi, MO_Q); break; } } @@ -2237,7 +2247,7 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } helper_check_align(env, addr, 0x3f); for (i = 0; i < 8; i++, rd += 2, addr += 8) { - helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x8f, 8); + helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x8f, MO_Q); } return; @@ -2255,7 +2265,7 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } helper_check_align(env, addr, 0x3f); for (i = 0; i < 8; i++, rd += 2, addr += 8) { - helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x19, 8); + helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x19, MO_Q); } return; @@ -2263,14 +2273,15 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, case ASI_FL16_S: /* 16-bit floating point load secondary */ case ASI_FL16_PL: /* 16-bit floating point load primary, LE */ case ASI_FL16_SL: /* 16-bit floating point load secondary, LE */ - helper_check_align(env, addr, 1); - /* Fall through */ + val = env->fpr[rd / 2].l.lower; + helper_st_asi(env, addr, val, asi & 0x8d, MO_UW); + return; case ASI_FL8_P: /* 8-bit floating point load primary */ case ASI_FL8_S: /* 8-bit floating point load secondary */ case ASI_FL8_PL: /* 8-bit floating point load primary, LE */ case ASI_FL8_SL: /* 8-bit floating point load secondary, LE */ val = env->fpr[rd / 2].l.lower; - helper_st_asi(env, addr, val, asi & 0x8d, ((asi & 2) >> 1) + 1); + helper_st_asi(env, addr, val, asi & 0x8d, MO_UB); return; default: helper_check_align(env, addr, 3); @@ -2285,14 +2296,14 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } else { val = env->fpr[rd / 2].l.upper; } - helper_st_asi(env, addr, val, asi, size); + helper_st_asi(env, addr, val, asi, MO_UL); break; case 8: - helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, size); + helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, MO_Q); break; case 16: - helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, 8); - helper_st_asi(env, addr + 8, env->fpr[rd / 2 + 1].ll, asi, 8); + helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, MO_Q); + helper_st_asi(env, addr + 8, env->fpr[rd / 2 + 1].ll, asi, MO_Q); break; } } @@ -2303,9 +2314,9 @@ target_ulong helper_casx_asi(CPUSPARCState *env, target_ulong addr, { target_ulong ret; - ret = helper_ld_asi(env, addr, asi, 8, 0); + ret = helper_ld_asi(env, addr, asi, MO_Q); if (val2 == ret) { - helper_st_asi(env, addr, val1, asi, 8); + helper_st_asi(env, addr, val1, asi, MO_Q); } return ret; } @@ -2318,10 +2329,10 @@ target_ulong helper_cas_asi(CPUSPARCState *env, target_ulong addr, target_ulong ret; val2 &= 0xffffffffUL; - ret = helper_ld_asi(env, addr, asi, 4, 0); + ret = helper_ld_asi(env, addr, asi, MO_UL); ret &= 0xffffffffUL; if (val2 == ret) { - helper_st_asi(env, addr, val1 & 0xffffffffUL, asi, 4); + helper_st_asi(env, addr, val1 & 0xffffffffUL, asi, MO_UL); } return ret; } diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 5fd096f..a023754 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2120,22 +2120,20 @@ static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr, default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(1 << (memop & MO_SIZE)); - TCGv_i32 r_sign = tcg_const_i32(!!(memop & MO_SIGN)); + TCGv_i32 r_mop = tcg_const_i32(memop); save_state(dc); #ifdef TARGET_SPARC64 - gen_helper_ld_asi(dst, cpu_env, addr, r_asi, r_size, r_sign); + gen_helper_ld_asi(dst, cpu_env, addr, r_asi, r_mop); #else { TCGv_i64 t64 = tcg_temp_new_i64(); - gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign); + gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop); tcg_gen_trunc_i64_tl(dst, t64); tcg_temp_free_i64(t64); } #endif - tcg_temp_free_i32(r_sign); - tcg_temp_free_i32(r_size); + tcg_temp_free_i32(r_mop); tcg_temp_free_i32(r_asi); } break; @@ -2159,20 +2157,20 @@ static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr, default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(1 << (memop & MO_SIZE)); + TCGv_i32 r_mop = tcg_const_i32(memop & MO_SIZE); save_state(dc); #ifdef TARGET_SPARC64 - gen_helper_st_asi(cpu_env, addr, src, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, src, r_asi, r_mop); #else { TCGv_i64 t64 = tcg_temp_new_i64(); tcg_gen_extu_tl_i64(t64, src); - gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_mop); tcg_temp_free_i64(t64); } #endif - tcg_temp_free_i32(r_size); + tcg_temp_free_i32(r_mop); tcg_temp_free_i32(r_asi); /* A write to a TLB register may alter page maps. End the TB. */ @@ -2193,20 +2191,18 @@ static void gen_swap_asi(DisasContext *dc, TCGv dst, TCGv src, default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(4); - TCGv_i32 r_sign = tcg_const_i32(0); + TCGv_i32 r_mop = tcg_const_i32(MO_UL); TCGv_i64 s64, t64; save_state(dc); t64 = tcg_temp_new_i64(); - gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign); - tcg_temp_free_i32(r_sign); + gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop); s64 = tcg_temp_new_i64(); tcg_gen_extu_tl_i64(s64, src); - gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_mop); tcg_temp_free_i64(s64); - tcg_temp_free_i32(r_size); + tcg_temp_free_i32(r_mop); tcg_temp_free_i32(r_asi); tcg_gen_trunc_i64_tl(dst, t64); @@ -2246,19 +2242,17 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn) default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(1); - TCGv_i32 r_sign = tcg_const_i32(0); + TCGv_i32 r_mop = tcg_const_i32(MO_UB); TCGv_i64 s64, t64; save_state(dc); t64 = tcg_temp_new_i64(); - gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign); - tcg_temp_free_i32(r_sign); + gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop); s64 = tcg_const_i64(0xff); - gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_mop); tcg_temp_free_i64(s64); - tcg_temp_free_i32(r_size); + tcg_temp_free_i32(r_mop); tcg_temp_free_i32(r_asi); tcg_gen_trunc_i64_tl(dst, t64); @@ -2408,15 +2402,15 @@ static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr, default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(8); + TCGv_i32 r_mop = tcg_const_i32(MO_Q); TCGv_i64 t64; save_state(dc); t64 = tcg_temp_new_i64(); tcg_gen_concat_tl_i64(t64, lo, hi); - gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size); - tcg_temp_free_i32(r_size); + gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_mop); + tcg_temp_free_i32(r_mop); tcg_temp_free_i32(r_asi); tcg_temp_free_i64(t64); } @@ -2460,13 +2454,11 @@ static void gen_ldda_asi(DisasContext *dc, TCGv addr, int insn, int rd) default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(8); - TCGv_i32 r_sign = tcg_const_i32(0); + TCGv_i32 r_mop = tcg_const_i32(MO_Q); save_state(dc); - gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign); - tcg_temp_free_i32(r_sign); - tcg_temp_free_i32(r_size); + gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop); + tcg_temp_free_i32(r_mop); tcg_temp_free_i32(r_asi); } break; @@ -2498,11 +2490,11 @@ static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr, default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(8); + TCGv_i32 r_mop = tcg_const_i32(MO_Q); save_state(dc); - gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size); - tcg_temp_free_i32(r_size); + gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_mop); + tcg_temp_free_i32(r_mop); tcg_temp_free_i32(r_asi); } break;