diff mbox

[2/2] drm/i915: Fix missed interrupts on gen6 blit ring by holding FORCEWAKE up.

Message ID 1306975283-14238-2-git-send-email-eric@anholt.net (mailing list archive)
State New, archived
Headers show

Commit Message

Eric Anholt June 2, 2011, 12:41 a.m. UTC
Before this patch, I was experiencing missed IRQs (hang, then dmesg
saying IRQ missed, then continuing) when running piglit
copypixels-sync about 0.5% of the time (no single run series I've done
so far got beyond 400 consecutive successes).  With this patch, I'm over
3200 consecutive successes with no missed IRQs.

---

This patch seems like a pretty clear indication that our understanding
of what requires FORCEWAKE is incorrect.  The only other patch I got
to succeed like this one was when I just left BLT IRQs on forever.

Can anyone cite where 0x40000 came from?

 drivers/gpu/drm/i915/intel_ringbuffer.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index c6c4d23..ef22e9b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -631,9 +631,11 @@  gen6_ring_get_irq(struct intel_ring_buffer *ring, u32 rflag)
 
 	spin_lock(&ring->irq_lock);
 	if (ring->irq_refcount++ == 0) {
+		gen6_gt_force_wake_get(dev_priv);
 		ring->irq_mask &= ~rflag;
 		I915_WRITE_IMR(ring, ring->irq_mask);
 		POSTING_READ(RING_IMR(ring->mmio_base));
+		gen6_gt_force_wake_put(dev_priv);
 	}
 	spin_unlock(&ring->irq_lock);
 
@@ -648,9 +650,11 @@  gen6_ring_put_irq(struct intel_ring_buffer *ring, u32 rflag)
 
 	spin_lock(&ring->irq_lock);
 	if (--ring->irq_refcount == 0) {
+		gen6_gt_force_wake_get(dev_priv);
 		ring->irq_mask |= rflag;
 		I915_WRITE_IMR(ring, ring->irq_mask);
 		POSTING_READ(RING_IMR(ring->mmio_base));
+		gen6_gt_force_wake_put(dev_priv);
 	}
 	spin_unlock(&ring->irq_lock);
 }