diff mbox

[igt] igt/pm_rpm: Wait for PCI D3

Message ID 1457360350-26395-1-git-send-email-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Chris Wilson March 7, 2016, 2:19 p.m. UTC
The transition to PCI device state D3 is not instantaneous and only
started when runtime suspended. Allow the driver/hardware a little bit
of time to complete the transition before declaring a test failure.

References: https://bugs.freedesktop.org/show_bug.cgi?id=93123
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/pm_rpm.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

Comments

Patrik Jakobsson March 7, 2016, 3:41 p.m. UTC | #1
On Mon, Mar 07, 2016 at 02:19:10PM +0000, Chris Wilson wrote:
> The transition to PCI device state D3 is not instantaneous and only
> started when runtime suspended. Allow the driver/hardware a little bit
> of time to complete the transition before declaring a test failure.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=93123
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  tests/pm_rpm.c | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
> index e84a9d3..03ef2eb 100644
> --- a/tests/pm_rpm.c
> +++ b/tests/pm_rpm.c
> @@ -1337,15 +1337,13 @@ static void reg_read_ioctl_subtest(void)
>  
>  static bool device_in_pci_d3(void)
>  {
> -	struct pci_device *pci_dev;
> -	int rc;
>  	uint16_t val;
> +	int rc;
>  
> -	pci_dev = intel_get_pci_device();
> -
> -	rc = pci_device_cfg_read_u16(pci_dev, &val, 0xd4);
> +	rc = pci_device_cfg_read_u16(intel_get_pci_device(), &val, 0xd4);
>  	igt_assert_eq(rc, 0);
>  
> +	igt_debug("%s: PCI D3 state=%d\n", __func__, val & 0x3);
>  	return (val & 0x3) == 0x3;
>  }
>  
> @@ -1354,11 +1352,9 @@ static void pci_d3_state_subtest(void)
>  	igt_require(has_runtime_pm);
>  
>  	disable_all_screens_and_wait(&ms_data);
> -
> -	igt_assert(device_in_pci_d3());
> +	igt_assert(igt_wait(device_in_pci_d3(), 2000, 100));

Not sure we need to wait for 2 full secs here but not a big problem if we do.

Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>

>  
>  	enable_one_screen_and_wait(&ms_data);
> -
>  	igt_assert(!device_in_pci_d3());
>  }
>  
> -- 
> 2.7.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Chris Wilson March 7, 2016, 4:11 p.m. UTC | #2
On Mon, Mar 07, 2016 at 04:41:55PM +0100, Patrik Jakobsson wrote:
> On Mon, Mar 07, 2016 at 02:19:10PM +0000, Chris Wilson wrote:
> > The transition to PCI device state D3 is not instantaneous and only
> > started when runtime suspended. Allow the driver/hardware a little bit
> > of time to complete the transition before declaring a test failure.
> > 
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=93123
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >  tests/pm_rpm.c | 12 ++++--------
> >  1 file changed, 4 insertions(+), 8 deletions(-)
> > 
> > diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
> > index e84a9d3..03ef2eb 100644
> > --- a/tests/pm_rpm.c
> > +++ b/tests/pm_rpm.c
> > @@ -1337,15 +1337,13 @@ static void reg_read_ioctl_subtest(void)
> >  
> >  static bool device_in_pci_d3(void)
> >  {
> > -	struct pci_device *pci_dev;
> > -	int rc;
> >  	uint16_t val;
> > +	int rc;
> >  
> > -	pci_dev = intel_get_pci_device();
> > -
> > -	rc = pci_device_cfg_read_u16(pci_dev, &val, 0xd4);
> > +	rc = pci_device_cfg_read_u16(intel_get_pci_device(), &val, 0xd4);
> >  	igt_assert_eq(rc, 0);
> >  
> > +	igt_debug("%s: PCI D3 state=%d\n", __func__, val & 0x3);
> >  	return (val & 0x3) == 0x3;
> >  }
> >  
> > @@ -1354,11 +1352,9 @@ static void pci_d3_state_subtest(void)
> >  	igt_require(has_runtime_pm);
> >  
> >  	disable_all_screens_and_wait(&ms_data);
> > -
> > -	igt_assert(device_in_pci_d3());
> > +	igt_assert(igt_wait(device_in_pci_d3(), 2000, 100));
> 
> Not sure we need to wait for 2 full secs here but not a big problem if we do.

2s was just a smallish number larger than what seemed reasonable for the
driver. It seems the longest wait may just be 120ms for certain Intel PCI
Express chipsets (drivers/pci/quirks.c) - so a safety factor of 10
before we declare the test a failure.
-Chris
diff mbox

Patch

diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
index e84a9d3..03ef2eb 100644
--- a/tests/pm_rpm.c
+++ b/tests/pm_rpm.c
@@ -1337,15 +1337,13 @@  static void reg_read_ioctl_subtest(void)
 
 static bool device_in_pci_d3(void)
 {
-	struct pci_device *pci_dev;
-	int rc;
 	uint16_t val;
+	int rc;
 
-	pci_dev = intel_get_pci_device();
-
-	rc = pci_device_cfg_read_u16(pci_dev, &val, 0xd4);
+	rc = pci_device_cfg_read_u16(intel_get_pci_device(), &val, 0xd4);
 	igt_assert_eq(rc, 0);
 
+	igt_debug("%s: PCI D3 state=%d\n", __func__, val & 0x3);
 	return (val & 0x3) == 0x3;
 }
 
@@ -1354,11 +1352,9 @@  static void pci_d3_state_subtest(void)
 	igt_require(has_runtime_pm);
 
 	disable_all_screens_and_wait(&ms_data);
-
-	igt_assert(device_in_pci_d3());
+	igt_assert(igt_wait(device_in_pci_d3(), 2000, 100));
 
 	enable_one_screen_and_wait(&ms_data);
-
 	igt_assert(!device_in_pci_d3());
 }