From patchwork Tue Mar 15 04:22:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 8585261 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CF7ECC0553 for ; Tue, 15 Mar 2016 04:19:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CDEB62021B for ; Tue, 15 Mar 2016 04:19:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C9CD120219 for ; Tue, 15 Mar 2016 04:19:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933619AbcCOESw (ORCPT ); Tue, 15 Mar 2016 00:18:52 -0400 Received: from mail-pf0-f182.google.com ([209.85.192.182]:33525 "EHLO mail-pf0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933428AbcCOESu (ORCPT ); Tue, 15 Mar 2016 00:18:50 -0400 Received: by mail-pf0-f182.google.com with SMTP id 124so10485544pfg.0; Mon, 14 Mar 2016 21:18:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=ZqD46WNsaH3L1xNGwCLhCtxcoLnxAvQIGN131ytaCVU=; b=cR6xjFCY6yyGvTkbLoWi1iUy2NHzWGUEXIi72M5yaQgZh2lPZnRpfcoDQ40mQaL3uj kKyuetKUVJjs0m/myk7bUiKfULyLAPsqeKmlv7l5EV09paXKfUB65GJ9GtSfAzn49p39 /WKikeFAkbdavRRQ3VTLCXq4s/Mk7lnsKiGdCymQt8h+/cZ+cSuqs1LLxy3Az9NJcffW INCxdaAxpwUD6bjlASlbPftmENjdV2iTuTm/shmnJ1H12GmVhUq75D4LldTWO1YCmelj NapRXneOhhgWRXFHFmr5xIN1sM8cnvEfxQs0ZgYws3mBIDFfricLPigL/Z8rKBK8YR7M 9LSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:date:message-id:in-reply-to :references:subject; bh=ZqD46WNsaH3L1xNGwCLhCtxcoLnxAvQIGN131ytaCVU=; b=lTJGR//GXSNpLr+zur+TZiIszxD8V8tELobW9DlaQxJICdLeT/oTHlX0PIXUPUtWeX vDFvdQua2K3nBH/uS4+G8gsO++UdV+Q9yGxxe6HaaIFLEtXY7ZZsbkdq/MBhJjmbqmcH 0zWhMbHHricSo2AbHRnIREFZjheYDRN+j8SgLqHt1yNbKxQAguAzw7ReksE0PDnPTpvo KjZDSpW4vZv+c/difqdsaN0CtEf3Sw+nvyzr0I5wTj+V8Ae4bMZXMFPCqBE4ppTdhvXP N8eOv6O3rHhTE9lgl5Q/xxyw804efhgJpsn4JXIwlq/tjzA+DV0kMuf49TZChxaXYDh4 3GtA== X-Gm-Message-State: AD7BkJKnHmZh+CN3k5JJque27WLT2M3On4fzA7jPtKjJ/0w0PFaLSzFey+XFdjX1hC7nzg== X-Received: by 10.98.73.88 with SMTP id w85mr35975022pfa.82.1458015524180; Mon, 14 Mar 2016 21:18:44 -0700 (PDT) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id p74sm35564850pfa.11.2016.03.14.21.18.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Mar 2016 21:18:43 -0700 (PDT) From: Magnus Damm To: iommu@lists.linux-foundation.org Cc: laurent.pinchart+renesas@ideasonboard.com, geert+renesas@glider.be, linux-sh@vger.kernel.org, joro@8bytes.org, linux-kernel@vger.kernel.org, horms+renesas@verge.net.au, Magnus Damm Date: Tue, 15 Mar 2016 13:22:04 +0900 Message-Id: <20160315042204.22103.88238.sendpatchset@little-apple> In-Reply-To: <20160315042136.22103.26570.sendpatchset@little-apple> References: <20160315042136.22103.26570.sendpatchset@little-apple> Subject: [PATCH v2 03/04] iommu/ipmmu-vmsa: Break out 32-bit ARM mapping code Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Make the driver compile on more than just 32-bit ARM by breaking out and wrapping ARM specific functions in #ifdefs. Not pretty, but needed to be able to use the driver on other architectures like ARM64. Signed-off-by: Magnus Damm --- Changes since V1: - Rebased to work without patch 2 and 3 from V1 series drivers/iommu/ipmmu-vmsa.c | 94 +++++++++++++++++++++++++++++--------------- 1 file changed, 62 insertions(+), 32 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0004/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2016-03-15 12:25:45.040513000 +0900 @@ -22,8 +22,10 @@ #include #include +#ifdef CONFIG_ARM #include #include +#endif #include "io-pgtable.h" @@ -38,7 +40,9 @@ struct ipmmu_vmsa_device { DECLARE_BITMAP(ctx, IPMMU_CTX_MAX); struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; +#ifdef CONFIG_ARM struct dma_iommu_mapping *mapping; +#endif }; struct ipmmu_vmsa_domain { @@ -615,6 +619,60 @@ static int ipmmu_find_utlbs(struct ipmmu return 0; } +#ifdef CONFIG_ARM +static int ipmmu_map_attach(struct device *dev, struct ipmmu_vmsa_device *mmu) +{ + int ret; + + /* + * Create the ARM mapping, used by the ARM DMA mapping core to allocate + * VAs. This will allocate a corresponding IOMMU domain. + * + * TODO: + * - Create one mapping per context (TLB). + * - Make the mapping size configurable ? We currently use a 2GB mapping + * at a 1GB offset to ensure that NULL VAs will fault. + */ + if (!mmu->mapping) { + struct dma_iommu_mapping *mapping; + + mapping = arm_iommu_create_mapping(&platform_bus_type, + SZ_1G, SZ_2G); + if (IS_ERR(mapping)) { + dev_err(mmu->dev, "failed to create ARM IOMMU mapping\n"); + return PTR_ERR(mapping); + } + + mmu->mapping = mapping; + } + + /* Attach the ARM VA mapping to the device. */ + ret = arm_iommu_attach_device(dev, mmu->mapping); + if (ret < 0) { + dev_err(dev, "Failed to attach device to VA mapping\n"); + arm_iommu_release_mapping(mmu->mapping); + } + + return ret; +} +static inline void ipmmu_detach(struct device *dev) +{ + arm_iommu_detach_device(dev); +} +static inline void ipmmu_release_mapping(struct ipmmu_vmsa_device *mmu) +{ + arm_iommu_release_mapping(mmu->mapping); +} +#else +static inline int ipmmu_map_attach(struct device *dev, + struct ipmmu_vmsa_device *mmu) +{ + return 0; +} +static inline void ipmmu_detach(struct device *dev) {} +static inline void ipmmu_release_mapping(struct ipmmu_vmsa_device *mmu) {} +#endif + static int ipmmu_add_device(struct device *dev) { struct ipmmu_vmsa_archdata *archdata; @@ -695,41 +753,13 @@ static int ipmmu_add_device(struct devic archdata->num_utlbs = num_utlbs; dev->archdata.iommu = archdata; - /* - * Create the ARM mapping, used by the ARM DMA mapping core to allocate - * VAs. This will allocate a corresponding IOMMU domain. - * - * TODO: - * - Create one mapping per context (TLB). - * - Make the mapping size configurable ? We currently use a 2GB mapping - * at a 1GB offset to ensure that NULL VAs will fault. - */ - if (!mmu->mapping) { - struct dma_iommu_mapping *mapping; - - mapping = arm_iommu_create_mapping(&platform_bus_type, - SZ_1G, SZ_2G); - if (IS_ERR(mapping)) { - dev_err(mmu->dev, "failed to create ARM IOMMU mapping\n"); - ret = PTR_ERR(mapping); - goto error; - } - - mmu->mapping = mapping; - } - - /* Attach the ARM VA mapping to the device. */ - ret = arm_iommu_attach_device(dev, mmu->mapping); - if (ret < 0) { - dev_err(dev, "Failed to attach device to VA mapping\n"); + ret = ipmmu_map_attach(dev, mmu); + if (ret < 0) goto error; - } return 0; error: - arm_iommu_release_mapping(mmu->mapping); - kfree(dev->archdata.iommu); kfree(utlbs); @@ -745,7 +775,7 @@ static void ipmmu_remove_device(struct d { struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; - arm_iommu_detach_device(dev); + ipmmu_detach(dev); iommu_group_remove_device(dev); kfree(archdata->utlbs); @@ -856,7 +886,7 @@ static int ipmmu_remove(struct platform_ list_del(&mmu->list); spin_unlock(&ipmmu_devices_lock); - arm_iommu_release_mapping(mmu->mapping); + ipmmu_release_mapping(mmu); ipmmu_device_reset(mmu);