From patchwork Mon Mar 28 09:36:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak M X-Patchwork-Id: 8678631 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 40139C0553 for ; Mon, 28 Mar 2016 09:37:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 50D0D2027D for ; Mon, 28 Mar 2016 09:36:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 61EDF2021F for ; Mon, 28 Mar 2016 09:36:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7127E6E150; Mon, 28 Mar 2016 09:36:56 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id C077D6E150 for ; Mon, 28 Mar 2016 09:36:53 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 28 Mar 2016 02:36:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,405,1455004800"; d="scan'208";a="920107412" Received: from mdeepakubuntudesk01-desktop.iind.intel.com ([10.223.26.119]) by orsmga001.jf.intel.com with ESMTP; 28 Mar 2016 02:36:52 -0700 From: Deepak M To: intel-gfx@lists.freedesktop.org Date: Mon, 28 Mar 2016 15:06:53 +0530 Message-Id: <1459157813-3966-1-git-send-email-m.deepak@intel.com> X-Mailer: git-send-email 1.9.1 Cc: Deepak M Subject: [Intel-gfx] [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These fields in VBT indicates the PWM source which is used and also the controller number. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_bios.c | 12 ++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 5 +++++ drivers/gpu/drm/i915/intel_vbt_defs.h | 6 ++++++ 4 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 050d860..30321e6 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1488,6 +1488,8 @@ struct intel_vbt_data { bool present; bool active_low_pwm; u8 min_brightness; /* min_brightness/255 of max */ + u8 pwm_pin; /* Source of PWM */ + u8 pwm_controller; /* Controller used in particular PWM */ } backlight; /* MIPI DSI */ diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 1af7074..1a5b124 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -284,6 +284,7 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, { const struct bdb_lfp_backlight_data *backlight_data; const struct bdb_lfp_backlight_data_entry *entry; + const struct bdb_lfp_backlight_control_data *bl_ctrl_data; backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); if (!backlight_data) @@ -296,6 +297,7 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, } entry = &backlight_data->data[panel_type]; + bl_ctrl_data = &backlight_data->blc_ctl[panel_type]; dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; if (!dev_priv->vbt.backlight.present) { @@ -304,6 +306,16 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, return; } + /* + * IF the VBT version is less than 191, set the + * pwm controller as PMIC by default. + */ + dev_priv->vbt.backlight.pwm_pin = BLC_CONTROL_PIN_PMIC; + if (bdb->version >= 191) { + dev_priv->vbt.backlight.pwm_pin = bl_ctrl_data->pin; + dev_priv->vbt.backlight.pwm_controller = bl_ctrl_data->controller; + } + dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; dev_priv->vbt.backlight.min_brightness = entry->min_brightness; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index c87b450..02a74b0 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -124,6 +124,11 @@ #define INTEL_I2C_BUS_DVO 1 #define INTEL_I2C_BUS_SDVO 2 +#define BLC_CONTROL_PIN_PMIC 0 +#define BLC_CONTROL_PIN_LPSS_PWM 1 +#define BLC_CONTROL_PIN_DDI 2 +#define BLC_CONTROL_PIN_PANEL_PWM 3 + /* these are outputs from the chip - integrated only external chips are via DVO or SDVO output */ enum intel_output_type { diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h index 749dcea..f6744dc 100644 --- a/drivers/gpu/drm/i915/intel_vbt_defs.h +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h @@ -440,10 +440,16 @@ struct bdb_lfp_backlight_data_entry { u8 obsolete3; } __packed; +struct bdb_lfp_backlight_control_data { + u8 pin:4; + u8 controller:4; +} __packed; + struct bdb_lfp_backlight_data { u8 entry_size; struct bdb_lfp_backlight_data_entry data[16]; u8 level[16]; + struct bdb_lfp_backlight_control_data blc_ctl[16]; } __packed; struct aimdb_header {