[1/2] drm/i915: Try to allocate more memory for FBC on Ironlake or GM45

Commit Message

Zhenyu Wang March 23, 2010, 3:12 a.m. UTC

None

Patch

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 902d286..61fb967 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1451,9 +1451,19 @@  static int i915_load_modeset_init(struct drm_device *dev,
 		int cfb_size;
 
 		/* Try to get an 8M buffer... */
-		if (prealloc_size > (9*1024*1024))
-			cfb_size = 8*1024*1024;
-		else /* fall back to 7/8 of the stolen space */
+		if (prealloc_size > (9*1024*1024)) {
+			if (IS_GM45(dev) || IS_IRONLAKE_M(dev)) {
+				if (prealloc_size >= (64 * 1024 * 1024))
+					cfb_size = 32 * 1024 * 1024;
+				else if (prealloc_size >= (32 * 1024 * 1024))
+					cfb_size = 24 * 1024 * 1024;
+				else if (prealloc_size >= (16 * 1024 * 1024))
+					cfb_size = 12 * 1024 * 1024;
+				else
+					cfb_size = 8 * 1024 * 1024;
+			} else
+				cfb_size = 8*1024*1024;
+		} else /* fall back to 7/8 of the stolen space */
 			cfb_size = prealloc_size * 7 / 8;
 		i915_setup_compression(dev, cfb_size);
 	}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e9f706c..2f7ca42 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1258,8 +1258,14 @@  static void intel_update_fbc(struct drm_crtc *crtc,
 		dev_priv->no_fbc_reason = FBC_UNSUPPORTED_MODE;
 		goto out_disable;
 	}
-	if ((mode->hdisplay > 2048) ||
-	    (mode->vdisplay > 1536)) {
+	if (IS_GM45(dev) || IS_IRONLAKE_M(dev)) {
+		if ((mode->hdisplay > 4096) || (mode->vdisplay > 2048)) {
+			DRM_DEBUG_KMS("mode too large for compression, "
+						"disabling\n");
+			dev_priv->no_fbc_reason = FBC_MODE_TOO_LARGE;
+			goto out_disable;
+		}
+	} else 	if ((mode->hdisplay > 2048) || (mode->vdisplay > 1536)) {
 		DRM_DEBUG_KMS("mode too large for compression, disabling\n");
 		dev_priv->no_fbc_reason = FBC_MODE_TOO_LARGE;
 		goto out_disable;