From patchwork Thu Apr 21 08:59:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8897591 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5C7BFBF29F for ; Thu, 21 Apr 2016 09:00:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 59A1C20211 for ; Thu, 21 Apr 2016 08:59:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 3EC9720340 for ; Thu, 21 Apr 2016 08:59:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AA0126EC3F; Thu, 21 Apr 2016 08:59:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id C6A416EC28 for ; Thu, 21 Apr 2016 08:59:42 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id n3so19912941wmn.1 for ; Thu, 21 Apr 2016 01:59:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=MRmBuP3Az+v94oo+9H+o6jW3W6DFdZIAXnCZft9kqWI=; b=P+/sXW9/Hf4LDwtXTYnO0tzdUTIuBHJE6Vqj2/Err/NJAq9bWG1NlNfLQKRA4DnVT1 nSSZGL7cJZMyxKcDpRdtXUF8E0W7Q0z+t6QH4Tu3TtV3TLaCqNl+SIP3uHUTVWlgRd/f vtur3ItG8q/I92/nVNNQsUH5avlHL5wHfdvrNBaxzlku9O7X/e6lVSS7hu4nxVhtsyLN UXgWfueOm1D4IszdHW1j+trmhsn2KcCKGpzZTGLWvxTkdWWtMX0Cg4GDYXsbW+gvFzqZ L6IABZlbPDbZih8W34H4Q4z1tYBKzF6/ajN/3wxoowuoGHd3ugftREEdQbEZ9UEi0gsR Gn4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references; bh=MRmBuP3Az+v94oo+9H+o6jW3W6DFdZIAXnCZft9kqWI=; b=e4luN7qAdiVvJBqK1qomEpcnkn6wp5JTQ3SaligUgasLlwwwXlQJeBLndTV12rr3ZX GQQbXOaQ9gaXjxNqTF2OEIVxEwO/FPly1dfV4KEpnQl5XfUYu38XueZ9CFIEVWz5zhP1 jRvT87RRapZR1cSwfx6nj+glYeZlnhhjjFae972HR8bE9mV4+qsN/wCrWQrBFAe2rYa8 wykLT0o9YjlQdeFa7bI/Xuq/vNHUCuR99rei/Vfwb8UbvGjUl57lVN6wDvXHd+Hv+R88 4yFM8rKWULLJCSACq2YcuMILDsOF7bjsfMssdJq0Um4PReMGFkC41WJnNcwQc6iQBX/Q DaTg== X-Gm-Message-State: AOPr4FX+pQc1wYJonkZqvLnE3mhUbguASJW7/QUnP+JxMV6OPOotOXdQWEqkI16VrA+/+w== X-Received: by 10.194.216.227 with SMTP id ot3mr13709433wjc.69.1461229181069; Thu, 21 Apr 2016 01:59:41 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id wa1sm1710773wjc.45.2016.04.21.01.59.39 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 01:59:39 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 21 Apr 2016 09:59:01 +0100 Message-Id: <1461229148-2939-12-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1461229148-2939-1-git-send-email-chris@chris-wilson.co.uk> References: <1461229148-2939-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 12/19] drm/i915: Replace the pinned context address with its unique ID X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Rather than reuse the current location of the context in the global GTT for its hardware identifier, use the context's unique ID assigned to it for its whole lifetime. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_debugfs.c | 12 +++++------- drivers/gpu/drm/i915/intel_lrc.c | 36 ++++++------------------------------ drivers/gpu/drm/i915/intel_lrc.h | 3 --- 3 files changed, 11 insertions(+), 40 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index d46413969daa..f775451bd0b6 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2043,15 +2043,13 @@ static void i915_dump_lrc_obj(struct seq_file *m, struct drm_i915_gem_object *ctx_obj = ctx->engine[engine->id].state; unsigned long ggtt_offset = 0; + seq_printf(m, "CONTEXT: %s %u\n", engine->name, ctx->hw_id); + if (ctx_obj == NULL) { - seq_printf(m, "Context on %s with no gem object\n", - engine->name); + seq_puts(m, "\tNot allocated\n"); return; } - seq_printf(m, "CONTEXT: %s %u\n", engine->name, - intel_execlists_ctx_id(ctx, engine)); - if (!i915_gem_obj_ggtt_bound(ctx_obj)) seq_puts(m, "\tNot bound in GGTT\n"); else @@ -2170,8 +2168,8 @@ static int i915_execlists(struct seq_file *m, void *data) seq_printf(m, "\t%d requests in queue\n", count); if (head_req) { - seq_printf(m, "\tHead request id: %u\n", - intel_execlists_ctx_id(head_req->ctx, engine)); + seq_printf(m, "\tHead request context: %u\n", + head_req->ctx->hw_id); seq_printf(m, "\tHead request tail: %u\n", head_req->tail); } diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 6179b591ee84..2ed7363f76ea 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -314,14 +314,12 @@ static void intel_lr_context_descriptor_update(struct intel_context *ctx, struct intel_engine_cs *engine) { - uint64_t lrca, desc; + u64 desc; - lrca = ctx->engine[engine->id].lrc_vma->node.start + - LRC_PPHWSP_PN * PAGE_SIZE; - - desc = engine->ctx_desc_template; /* bits 0-11 */ - desc |= lrca; /* bits 12-31 */ - desc |= (lrca >> PAGE_SHIFT) << GEN8_CTX_ID_SHIFT; /* bits 32-51 */ + desc = engine->ctx_desc_template; /* bits 0-11 */ + desc |= ctx->engine[engine->id].lrc_vma->node.start + + LRC_PPHWSP_PN * PAGE_SIZE; /* bits 12-31 */ + desc |= (u64)ctx->hw_id << GEN8_CTX_ID_SHIFT; /* bits 32-51 */ ctx->engine[engine->id].lrc_desc = desc; } @@ -332,28 +330,6 @@ uint64_t intel_lr_context_descriptor(struct intel_context *ctx, return ctx->engine[engine->id].lrc_desc; } -/** - * intel_execlists_ctx_id() - get the Execlists Context ID - * @ctx: Context to get the ID for - * @ring: Engine to get the ID for - * - * Do not confuse with ctx->id! Unfortunately we have a name overload - * here: the old context ID we pass to userspace as a handler so that - * they can refer to a context, and the new context ID we pass to the - * ELSP so that the GPU can inform us of the context status via - * interrupts. - * - * The context ID is a portion of the context descriptor, so we can - * just extract the required part from the cached descriptor. - * - * Return: 20-bits globally unique context ID. - */ -u32 intel_execlists_ctx_id(struct intel_context *ctx, - struct intel_engine_cs *engine) -{ - return intel_lr_context_descriptor(ctx, engine) >> GEN8_CTX_ID_SHIFT; -} - static void execlists_elsp_write(struct drm_i915_gem_request *rq0, struct drm_i915_gem_request *rq1) { @@ -499,7 +475,7 @@ execlists_check_remove_request(struct intel_engine_cs *engine, u32 request_id) if (!head_req) return 0; - if (unlikely(intel_execlists_ctx_id(head_req->ctx, engine) != request_id)) + if (unlikely(head_req->ctx->hw_id != request_id)) return 0; WARN(head_req->elsp_submitted == 0, "Never submitted head request\n"); diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h index 461f1ef9b5c1..b17ab79333aa 100644 --- a/drivers/gpu/drm/i915/intel_lrc.h +++ b/drivers/gpu/drm/i915/intel_lrc.h @@ -114,9 +114,6 @@ void intel_lr_context_reset(struct drm_i915_private *dev_priv, uint64_t intel_lr_context_descriptor(struct intel_context *ctx, struct intel_engine_cs *engine); -u32 intel_execlists_ctx_id(struct intel_context *ctx, - struct intel_engine_cs *engine); - /* Execlists */ int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists); struct i915_execbuffer_params;