Message ID | 1461240353-29576-1-git-send-email-tvrtko.ursulin@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Thu, Apr 21, 2016 at 01:05:51PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Using four bits for the pin count in the middle of the data > structure just makes the compiler generate verbose code. Or rather by opening coding this we can do much better and simultaneously checking pin and binding inside the hot i915_vma_pin function. -Chris
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index d7dd3d8a8758..b4766c4c4bac 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -213,9 +213,9 @@ struct i915_vma { * and the framebuffer code. When switching/pageflipping, the * framebuffer code has at most two buffers pinned per crtc. * - * In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3 - * bits with absolutely no headroom. So use 4 bits. */ - unsigned int pin_count:4; + * In the worst case this is 1 + 1 + 1 + 2*2 = 7. + */ + unsigned int pin_count; #define DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf };