From patchwork Sun Apr 24 07:18:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8919681 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4FCF89F372 for ; Sun, 24 Apr 2016 07:19:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 645F7201C7 for ; Sun, 24 Apr 2016 07:19:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8262F201FA for ; Sun, 24 Apr 2016 07:19:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A8EEA6E0D4; Sun, 24 Apr 2016 07:19:22 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8A2216E09F for ; Sun, 24 Apr 2016 07:19:10 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id n3so16105851wmn.1 for ; Sun, 24 Apr 2016 00:19:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Hwtn6vqngONtdjBMPvzhn5SigYg+6dWEiyOWwRGtRzo=; b=yKS+4iqyDRROOkv4xvUhg8os9mC7rD9HLRKfiNRJRBUAJaxdwvHTKJVLjhDBJmAaEt 7TsQKpSEmkbPEYecocG+sEnyRuJu2tsjMIK+g7enR0e8M4ZeRkYG87hQLndmWbgR8oHm sduC2olRKFQBw/RuismQEbH1WwWXnVqAveUKWwqE5hq9ucjJ07CHMm7L3rTWsgBYdYnk Fz7Cg/ZuBnA8XIk97s0NbgJ8xhGF+je/PqiAPAKRDbvfDFU0vxZriqp9lwCJPhgIecAV StD/xtlsbSpb79TvJfkZZsmxmRn8EN8Z9PRdrZu8UX3j7nG4XdxqDlNf/eLGVXvLs9u+ MYuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=Hwtn6vqngONtdjBMPvzhn5SigYg+6dWEiyOWwRGtRzo=; b=Irhyyw94W+7AAp1BnP6rtN8O7Cc4J8+ATAr2UsbuneLEmq4QA+RwIfp5kkv+kimtdr S1udDhd4wtPEY3xbzWbeYzbT777AifJNOdVDZ+eM4wlNopuXnABKL3LxxdTGzTzgIdD3 kOKo9Tw0mmLdJqK0zuR3Tz+m9LZoCPxojS0Up/sGeVkg3Tq40fD0cr5pguHI053z0dqe fW23cVN+dgD6ykwfXs4YGbolT8VSrNdeugsoEMb3VcBdV7iHgn7jdBjpxqWeur3L16s8 GTGhG4sZTKEzL4J4J1uOMxh6tZO2GZZ0XyxMAZRc/ktT3C5lgflF5PPJVh+d0RzkMGVI e0Dw== X-Gm-Message-State: AOPr4FUgr7jptTDpr3Y4lu5w2ukET+uGeJGxiZJv8CIyjIW5YTrcel71s4aBYPUqZB1GFA== X-Received: by 10.194.16.133 with SMTP id g5mr28541964wjd.42.1461482349035; Sun, 24 Apr 2016 00:19:09 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id i11sm16937119wjn.36.2016.04.24.00.19.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 24 Apr 2016 00:19:07 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Sun, 24 Apr 2016 08:18:33 +0100 Message-Id: <1461482332-21975-2-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1461482332-21975-1-git-send-email-chris@chris-wilson.co.uk> References: <1461482332-21975-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 02/21] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When setting up the overlay page, we pin it into the GGTT (when using virtual addresses) and store the offset as overlay->flip_addr. Rather than doing a lookup of the GGTT address everytime, we can use the known address instead. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_overlay.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index bcc3b6a016d8..9746b9841c13 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -198,7 +198,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay) regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr; else regs = io_mapping_map_wc(ggtt->mappable, - i915_gem_obj_ggtt_offset(overlay->reg_bo)); + overlay->flip_addr); return regs; } @@ -1493,7 +1493,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay) overlay->reg_bo->phys_handle->vaddr; else regs = io_mapping_map_atomic_wc(ggtt->mappable, - i915_gem_obj_ggtt_offset(overlay->reg_bo)); + overlay->flip_addr); return regs; } @@ -1523,10 +1523,7 @@ intel_overlay_capture_error_state(struct drm_device *dev) error->dovsta = I915_READ(DOVSTA); error->isr = I915_READ(ISR); - if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) - error->base = (__force long)overlay->reg_bo->phys_handle->vaddr; - else - error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo); + error->base = overlay->flip_addr; regs = intel_overlay_map_regs_atomic(overlay); if (!regs)