| Message ID | 1462545621-30125-1-git-send-email-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, May 09, 2016 at 12:23:31PM -0000, Patchwork wrote: > == Series Details == > > Series: series starting with [for-CI,1/3] drm: Restore double clflush on the last partial cacheline > URL : https://patchwork.freedesktop.org/series/6839/ > State : warning > > == Summary == > > Series 6839v1 Series without cover letter > http://patchwork.freedesktop.org/api/1.0/series/6839/revisions/1/mbox/ > > Test gem_exec_flush: > Subgroup basic-batch-kernel-default-cmd: > fail -> PASS (byt-nuc) > Subgroup basic-uc-pro-default: > fail -> PASS (bsw-nuc-2) > fail -> PASS (byt-nuc) > Subgroup basic-uc-prw-default: > fail -> PASS (bsw-nuc-2) > Test kms_pipe_crc_basic: > Subgroup nonblocking-crc-pipe-c: > pass -> SKIP (hsw-brixbox) > Subgroup suspend-read-crc-pipe-c: > skip -> PASS (hsw-brixbox) Minor conflict with Turslin, hopefully resolved without issue. -Chris
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c index 6743ff7dccfa..7f4a6c550319 100644 --- a/drivers/gpu/drm/drm_cache.c +++ b/drivers/gpu/drm/drm_cache.c @@ -136,6 +136,7 @@ drm_clflush_virt_range(void *addr, unsigned long length) mb(); for (; addr < end; addr += size) clflushopt(addr); + clflushopt(end - 1); /* force serialisation */ mb(); return; }
This effectively reverts commit afcd950cafea6e27b739fe7772cbbeed37d05b8b Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Jun 10 15:58:01 2015 +0100 drm: Avoid the double clflush on the last cache line in drm_clflush_virt_range() as we have observed issues with serialisation of the clflush operations on Baytrail+ Atoms with partial updates. Applying the double flush on the last cacheline forces that clflush to be ordered with respect to the previous clflush, and the mfence then protects against prefetches crossing the clflush boundary. The same issue can be demonstrated in userspace with igt/gem_exec_flush. Fixes: afcd950cafea6 (drm: Avoid the double clflush on the last cache...) Testcase: igt/gem_concurrent_blit Testcase: igt/gem_partial_pread_pwrite Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92845 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: dri-devel@lists.freedesktop.org Cc: Akash Goel <akash.goel@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jason Ekstrand <jason.ekstrand@intel.com> Cc: stable@vger.kernel.org Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/drm_cache.c | 1 + 1 file changed, 1 insertion(+)