From patchwork Wed May 11 12:02:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9068271 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 06981BF29F for ; Wed, 11 May 2016 12:03:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 021B6200E9 for ; Wed, 11 May 2016 12:03:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7DF2A201BB for ; Wed, 11 May 2016 12:03:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752456AbcEKMCp (ORCPT ); Wed, 11 May 2016 08:02:45 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:28622 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751400AbcEKMCl (ORCPT ); Wed, 11 May 2016 08:02:41 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O7000B8KHG9GH50@mailout4.w1.samsung.com>; Wed, 11 May 2016 13:02:33 +0100 (BST) X-AuditID: cbfec7f5-f792a6d000001302-5f-57331f59ed46 Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 31.0B.04866.95F13375; Wed, 11 May 2016 13:02:33 +0100 (BST) Received: from AMDC2174.DIGITAL.local ([106.120.53.17]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O7000965HG0RB60@eusync3.samsung.com>; Wed, 11 May 2016 13:02:33 +0100 (BST) From: Krzysztof Kozlowski To: Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd , Kukjin Kim , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Bartlomiej Zolnierkiewicz Subject: [PATCH 10/18] clk: samsung: exynos5410: Constify all clock initializers Date: Wed, 11 May 2016 14:02:06 +0200 Message-id: <1462968134-6085-10-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1462968134-6085-1-git-send-email-k.kozlowski@samsung.com> References: <1462968134-6085-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrLLMWRmVeSWpSXmKPExsVy+t/xq7qR8sbhBi9mqVhsnLGe1eL1C0OL /sevmS02Pb7GavGx5x6rxeVdc9gsZpzfx2Rx8ZSrxeE37awWP850s1is2vWH0YHb4/2NVnaP y329TB47Z91l99i0qpPNY/OSeo++LasYPT5vkgtgj+KySUnNySxLLdK3S+DKOLx+O3PBD4GK 790PWBsYN/J1MXJySAiYSEz+s48JwhaTuHBvPVsXIxeHkMBSRokf/7+wgiSEBBqZJNYsEwKx 2QSMJTYvXwJWJCLQxCzxYFcLM0iCWcBCYuvW1exdjBwcwgIBEpfnmoOEWQRUJS52PwGbwyvg LvGvu5cZYpmcxMljk8HinEDx2+sOMYG0Cgm4STz7zj2BkXcBI8MqRtHU0uSC4qT0XCO94sTc 4tK8dL3k/NxNjJBA/LqDcekxq0OMAhyMSjy8G6qMwoVYE8uKK3MPMUpwMCuJ8M6VNQ4X4k1J rKxKLcqPLyrNSS0+xCjNwaIkzjtz1/sQIYH0xJLU7NTUgtQimCwTB6dUA2OrYvjZHQEHz8xM ab4X6x912JF/IZve7dlyCQbTpzLo7BfbtfaKeGP0HMlHwnOWFs7T4rnJobFU/sF7478fjjFs UFPfHmtrpvbV3+ehwG/33pUs10JE7yluLDnwvvlj1Xmhp03HHBk0ufV4dY7Hx6no6wjFL/a7 lfCpdukW9m/vD2Sas/WyKiqxFGckGmoxFxUnAgDaoV7EQAIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP All of initialization data can be made const. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/samsung/clk-exynos5410.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c index d5d5dcabc4a9..8e8c7cca8c62 100644 --- a/drivers/clk/samsung/clk-exynos5410.c +++ b/drivers/clk/samsung/clk-exynos5410.c @@ -76,7 +76,7 @@ PNAME(group2_p) = { "fin_pll", "fin_pll", "none", "none", "none", "none", "sclk_mpll_bpll", "none", "none", "sclk_cpll" }; -static struct samsung_mux_clock exynos5410_mux_clks[] __initdata = { +static const struct samsung_mux_clock exynos5410_mux_clks[] __initconst = { MUX(0, "mout_apll", apll_p, SRC_CPU, 0, 1), MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), @@ -105,7 +105,7 @@ static struct samsung_mux_clock exynos5410_mux_clks[] __initdata = { MUX(0, "mout_aclk400", mpll_bpll_p, SRC_TOP0, 20, 1), }; -static struct samsung_div_clock exynos5410_div_clks[] __initdata = { +static const struct samsung_div_clock exynos5410_div_clks[] __initconst = { DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), DIV(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3), @@ -141,7 +141,7 @@ static struct samsung_div_clock exynos5410_div_clks[] __initdata = { DIV(0, "aclk400", "mout_aclk400", DIV_TOP0, 24, 3), }; -static struct samsung_gate_clock exynos5410_gate_clks[] __initdata = { +static const struct samsung_gate_clock exynos5410_gate_clks[] __initconst = { GATE(CLK_MCT, "mct", "aclk66", GATE_IP_PERIS, 18, 0, 0), GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0", @@ -167,7 +167,7 @@ static struct samsung_gate_clock exynos5410_gate_clks[] __initdata = { SRC_MASK_PERIC0, 8, CLK_SET_RATE_PARENT, 0), }; -static struct samsung_pll_clock exynos5410_plls[nr_plls] __initdata = { +static const struct samsung_pll_clock exynos5410_plls[nr_plls] __initconst = { [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK, APLL_CON0, NULL), [cpll] = PLL(pll_35xx, CLK_FOUT_CPLL, "fout_cpll", "fin_pll", CPLL_LOCK,