From patchwork Tue Jun 7 22:44:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 9162743 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C18DC60467 for ; Tue, 7 Jun 2016 22:47:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B325828360 for ; Tue, 7 Jun 2016 22:47:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A79692836E; Tue, 7 Jun 2016 22:47:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3037728360 for ; Tue, 7 Jun 2016 22:47:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423515AbcFGWpS (ORCPT ); Tue, 7 Jun 2016 18:45:18 -0400 Received: from mail-pa0-f50.google.com ([209.85.220.50]:34732 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1423494AbcFGWpO (ORCPT ); Tue, 7 Jun 2016 18:45:14 -0400 Received: by mail-pa0-f50.google.com with SMTP id bz2so49944994pad.1 for ; Tue, 07 Jun 2016 15:45:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ILjkSWdicnKlkjSk54eUQIGzEcK5DFEqGGJzOWV/de4=; b=RlvwIG6KT5ESKGjBNVLlO12e0G3idTn29sLdcuv+QADGilGs3U2z/Xl04/v4sHNJtD 4XsYMLvWDPH+g+4EdqyxGgFpyyfcfnpGUoYr82kv4O9Lmz+GEgTIdldhHICXNOoBTttB ZSeWcK0iY8vlWHipMHpG7l5i6uUyYU0bcVkRU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ILjkSWdicnKlkjSk54eUQIGzEcK5DFEqGGJzOWV/de4=; b=d/LzsyasijdAlPLpmqcVjszf8mQtKeCJXjoJriuyBoIH8DsI0D1B45O32Sq5NBfKtN TMACjuzzhmkWg1F6mj8ZFXjcRD/NLotAT7835RujFZrSrm3dFHfA4KXdlSiDoCtpvef8 WBqOunhSLpGqbSp/dX1kKjqzyEhU9te06rgdZ2bRVoMtRWKrLriolIUjDtJu+fO/wVDX 35gr2qRSvJQgfqOeF24WUbIzx3vTbQ1VOHYiU14p9txG9EtXqqX0vWrquKf9Ebcd2Lku S5xqn6blgNPluYiY/2regUvCfVk4T/bC7qDMdyRhjePapGXYucgm/jUe1BzzjuHCAssL PJ5Q== X-Gm-Message-State: ALyK8tIVdhGgBOynxUedK793AMIfPnu8JFAWX/RwxzLPs6GKAyiQ7/L4l+LQUPFNDbcIHB+2 X-Received: by 10.66.89.228 with SMTP id br4mr1966933pab.110.1465339513432; Tue, 07 Jun 2016 15:45:13 -0700 (PDT) Received: from tictac.mtv.corp.google.com ([172.22.65.76]) by smtp.gmail.com with ESMTPSA id 4sm37641782pfm.15.2016.06.07.15.45.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Jun 2016 15:45:13 -0700 (PDT) From: Douglas Anderson To: ulf.hansson@linaro.org, kishon@ti.com, Heiko Stuebner , robh+dt@kernel.org Cc: shawn.lin@rock-chips.com, xzy.xu@rock-chips.com, briannorris@chromium.org, adrian.hunter@intel.com, linux-rockchip@lists.infradead.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Douglas Anderson , pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, catalin.marinas@arm.com, will.deacon@arm.com, jay.xu@rock-chips.com, wxt@rock-chips.com, zhengxing@rock-chips.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Date: Tue, 7 Jun 2016 15:44:38 -0700 Message-Id: <1465339484-969-6-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: <1465339484-969-1-git-send-email-dianders@chromium.org> References: <1465339484-969-1-git-send-email-dianders@chromium.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On rk3399 we'd like to be able to properly set corecfg registers in the Arasan SDHCI component. Specify the syscon to enable that. Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index a4383f359264..1b57e92e0093 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -220,6 +220,7 @@ compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; reg = <0x0 0xfe330000 0x0 0x10000>; interrupts = ; + arasan,soc-ctl-syscon = <&grf>; assigned-clocks = <&cru SCLK_EMMC>; assigned-clock-rates = <200000000>; clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;