From patchwork Wed Jun 8 13:26:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shunqian Zheng X-Patchwork-Id: 9164629 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DCDF4604DB for ; Wed, 8 Jun 2016 13:28:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CE3AB28047 for ; Wed, 8 Jun 2016 13:28:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C2C0F281F9; Wed, 8 Jun 2016 13:28:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BD56328047 for ; Wed, 8 Jun 2016 13:28:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bAdWq-0003zm-9n; Wed, 08 Jun 2016 13:28:16 +0000 Received: from mail-pf0-f194.google.com ([209.85.192.194]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1bAdW1-00038Y-6T; Wed, 08 Jun 2016 13:27:28 +0000 Received: by mail-pf0-f194.google.com with SMTP id 62so636642pfd.3; Wed, 08 Jun 2016 06:27:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JfGU8zioP2hqwOwgVsHlz8U28tsgKidwBsQAs3p38l8=; b=HRTdGDEArU9mQH0BEb4ecYFmOExNE01rvWvww3txBTnGwLyggIMIeGUo6ND/ehwSTK T6bleTHY4+H/36tDmIFL0ZdqVvN0svZnr663v13cO73zzRJ5SXr9vE384KeisQMvtOcM +J7kcSEzYjbwzkWOq1M5WyVuS2ZMuqhTVz/Dn6NTinA85WLbmL2UjiFS9FNf5jSyxarW Bwsc5tQLbX1JjxICGH+l3dcfoK7HgQB686QBtNfsNQsShRAZKdw06PNvkS9oQs5fhljX Vv4tDDHvh40V4VX6cfaeGJ+3GZs7jw9pxejyLbcvPKY3N0nM1pmRFfJbh/xBT9l6raz/ 7w9w== X-Gm-Message-State: ALyK8tLL/L6ryOMyaehPomW5up5JudkQ1PlZJqHOGzuYhQSh2V7We2hEGUNz4VVPeZ/WCA== X-Received: by 10.98.36.140 with SMTP id k12mr5889258pfk.118.1465392428528; Wed, 08 Jun 2016 06:27:08 -0700 (PDT) Received: from SHUNQIAN-W530.example.org ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id tn7sm2604010pac.29.2016.06.08.06.27.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 08 Jun 2016 06:27:08 -0700 (PDT) From: Shunqian Zheng To: joro@8bytes.org, heiko@sntech.de, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, mark.yao@rock-chips.com, airlied@linux.ie, tfiga@google.com, xxm@rock-chips.com Subject: [PATCH v2 5/7] drm: rockchip: use common iommu api to attach iommu Date: Wed, 8 Jun 2016 21:26:30 +0800 Message-Id: <1465392392-2003-6-git-send-email-zhengsq@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465392392-2003-1-git-send-email-zhengsq@rock-chips.com> References: <1465392392-2003-1-git-send-email-zhengsq@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160608_062725_506347_8BFA5D49 X-CRM114-Status: GOOD ( 15.98 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux-foundation.org, Shunqian Zheng , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Rockchip DRM used the arm special API, arm_iommu_*(), to attach iommu for ARM32 SoCs. This patch convert to common iommu API so it would support ARM64 like RK3399. The general idea is domain_alloc(), attach_device() and arch_setup_dma_ops() to set dma_ops manually for DRM at the last. Signed-off-by: Shunqian Zheng --- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 130 +++++++++++++++++++--------- drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + 2 files changed, 89 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c index f5a68fc..7965a66 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c @@ -14,8 +14,6 @@ * GNU General Public License for more details. */ -#include - #include #include #include @@ -24,6 +22,8 @@ #include #include #include +#include +#include #include "rockchip_drm_drv.h" #include "rockchip_drm_fb.h" @@ -46,7 +46,8 @@ static bool is_support_iommu = true; int rockchip_drm_dma_attach_device(struct drm_device *drm_dev, struct device *dev) { - struct dma_iommu_mapping *mapping = drm_dev->dev->archdata.mapping; + struct rockchip_drm_private *private = drm_dev->dev_private; + struct iommu_domain *domain = private->domain; int ret; if (!is_support_iommu) @@ -58,16 +59,25 @@ int rockchip_drm_dma_attach_device(struct drm_device *drm_dev, dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); - return arm_iommu_attach_device(dev, mapping); + ret = iommu_attach_device(domain, dev); + + if (ret) { + dev_err(dev, "Failed to attach iommu device\n"); + return ret; + } + arch_setup_dma_ops(dev, 0x00000000, SZ_2G, + (struct iommu_ops *)dev->bus->iommu_ops, false); + return 0; } void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, struct device *dev) { - if (!is_support_iommu) - return; + struct rockchip_drm_private *private = drm_dev->dev_private; + struct iommu_domain *domain = private->domain; - arm_iommu_detach_device(dev); + if (is_support_iommu) + iommu_detach_device(domain, dev); } int rockchip_register_crtc_funcs(struct drm_crtc *crtc, @@ -132,10 +142,70 @@ static void rockchip_drm_crtc_disable_vblank(struct drm_device *dev, priv->crtc_funcs[pipe]->disable_vblank(crtc); } +static int rockchip_drm_init_iommu(struct drm_device *drm_dev) +{ + struct rockchip_drm_private *private = drm_dev->dev_private; + struct device *dev = drm_dev->dev; + int ret; + + dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms), + GFP_KERNEL); + if (!dev->dma_parms) { + ret = -ENOMEM; + return ret; + } + + ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); + if (ret) { + dev_err(dev, "Failed to set coherent mask\n"); + return ret; + } + + dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); + + private->domain = iommu_domain_alloc(&platform_bus_type); + if (!private->domain) + return -ENOMEM; + + ret = iommu_get_dma_cookie(private->domain); + if (ret) { + dev_err(dev, "Failed to get dma cookie\n"); + goto err_free_domain; + } + + ret = iommu_dma_init_domain(private->domain, 0x00000000, SZ_2G); + if (ret) { + dev_err(dev, "Failed to init domain\n"); + goto err_put_cookie; + } + + ret = rockchip_drm_dma_attach_device(drm_dev, dev); + if (ret) { + dev_err(dev, "Failed to attach device\n"); + goto err_put_cookie; + } + + return 0; + +err_put_cookie: + iommu_put_dma_cookie(private->domain); +err_free_domain: + iommu_domain_free(private->domain); + + return ret; +} + +static void rockchip_iommu_cleanup(struct drm_device *drm_dev) +{ + struct rockchip_drm_private *private = drm_dev->dev_private; + + iommu_put_dma_cookie(private->domain); + iommu_domain_free(private->domain); +} + static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags) { struct rockchip_drm_private *private; - struct dma_iommu_mapping *mapping = NULL; struct device *dev = drm_dev->dev; struct drm_connector *connector; int ret; @@ -153,38 +223,18 @@ static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags) rockchip_drm_mode_config_init(drm_dev); - dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms), - GFP_KERNEL); - if (!dev->dma_parms) { - ret = -ENOMEM; - goto err_config_cleanup; - } - if (is_support_iommu) { - /* TODO(djkurtz): fetch the mapping start/size from somewhere */ - mapping = arm_iommu_create_mapping(&platform_bus_type, - 0x00000000, - SZ_2G); - if (IS_ERR(mapping)) { - ret = PTR_ERR(mapping); - goto err_config_cleanup; - } - - ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); + ret = rockchip_drm_init_iommu(drm_dev); if (ret) - goto err_release_mapping; - - dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); - - ret = arm_iommu_attach_device(dev, mapping); - if (ret) - goto err_release_mapping; + goto err_config_cleanup; } /* Try to bind all sub drivers. */ ret = component_bind_all(dev, drm_dev); - if (ret) - goto err_detach_device; + if (ret) { + dev_err(dev, "Failed to bind components\n"); + goto err_iommu_cleanup; + } /* * All components are now added, we can publish the connector sysfs @@ -222,21 +272,17 @@ static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags) if (ret) goto err_vblank_cleanup; - if (is_support_iommu) - arm_iommu_release_mapping(mapping); return 0; + err_vblank_cleanup: drm_vblank_cleanup(drm_dev); err_kms_helper_poll_fini: drm_kms_helper_poll_fini(drm_dev); err_unbind: component_unbind_all(dev, drm_dev); -err_detach_device: - if (is_support_iommu) - arm_iommu_detach_device(dev); -err_release_mapping: +err_iommu_cleanup: if (is_support_iommu) - arm_iommu_release_mapping(mapping); + rockchip_iommu_cleanup(drm_dev); err_config_cleanup: drm_mode_config_cleanup(drm_dev); drm_dev->dev_private = NULL; @@ -252,7 +298,7 @@ static int rockchip_drm_unload(struct drm_device *drm_dev) drm_kms_helper_poll_fini(drm_dev); component_unbind_all(dev, drm_dev); if (is_support_iommu) - arm_iommu_detach_device(dev); + rockchip_iommu_cleanup(drm_dev); drm_mode_config_cleanup(drm_dev); drm_dev->dev_private = NULL; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index 56f43a3..1e2a666 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -70,6 +70,7 @@ struct rockchip_drm_private { const struct rockchip_crtc_funcs *crtc_funcs[ROCKCHIP_MAX_CRTC]; struct rockchip_atomic_commit commit; + struct iommu_domain *domain; }; void rockchip_drm_atomic_work(struct work_struct *work);