[v3,01/10] drm/bridge: analogix_dp: rename RK3288_DP to ROCKCHIP_DP
diff mbox

Message ID 1465904764-762-1-git-send-email-ykk@rock-chips.com
State New
Headers show

Commit Message

Yakir Yang June 14, 2016, 11:46 a.m. UTC
Rename RK3288_DP macros to ROCKCHIP_DP, prepare to add eDP
support for more Rockchip chips.


Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
Changes in v3:
- Correct the misspell of "marcos" in commit message (Dominik, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346312/9//COMMIT_MSG@9]
- Add reviewed flag from Stéphane.
    [https://chromium-review.googlesource.com/#/c/346312/16]
- Add tested flag from Javier.

Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 4 ++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 6 +++---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 2 +-
 include/drm/bridge/analogix_dp.h                   | 2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

Comments

Sean Paul June 23, 2016, 1:20 p.m. UTC | #1
On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> Rename RK3288_DP macros to ROCKCHIP_DP, prepare to add eDP
> support for more Rockchip chips.
>
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>


I'm ok with this as long as there aren't going to be future rockchip
tweaks to the driver that will need to be separate from those already
there (ie: versioned). In the tegra driver, the product numbers serve
to represent the first product with said feature or quirk, the same
could have been done here.

However, if we know that all rockchip devices in the future will not
need to differentiate from each other, this seems fine.

Reviewed-by: Sean Paul <seanpaul@chromium.org>

> ---
> Changes in v3:
> - Correct the misspell of "marcos" in commit message (Dominik, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/346312/9//COMMIT_MSG@9]
> - Add reviewed flag from Stéphane.
>     [https://chromium-review.googlesource.com/#/c/346312/16]
> - Add tested flag from Javier.
>
> Changes in v2: None
>
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 4 ++--
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 6 +++---
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 2 +-
>  include/drm/bridge/analogix_dp.h                   | 2 +-
>  4 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 7699597..4a1b3b8 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -1207,9 +1207,9 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
>         struct video_info *video_info = &dp->video_info;
>
>         switch (dp->plat_data->dev_type) {
> -       case RK3288_DP:
> +       case ROCKCHIP_DP:
>                 /*
> -                * Like Rk3288 DisplayPort TRM indicate that "Main link
> +                * Like Rockchip DisplayPort TRM indicate that "Main link
>                  * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
>                  */
>                 video_info->max_link_rate = 0x0A;
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 49205ef..931a76c 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -74,7 +74,7 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
>         reg = SEL_24M | TX_DVDD_BIT_1_0625V;
>         writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
>
> -       if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
> +       if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) {
>                 writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
>                 writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
>                 writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
> @@ -244,7 +244,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>         u32 reg;
>         u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
>
> -       if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
> +       if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
>                 phy_pd_addr = ANALOGIX_DP_PD;
>
>         switch (block) {
> @@ -448,7 +448,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
>         analogix_dp_reset_aux(dp);
>
>         /* Disable AUX transaction H/W retry */
> -       if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
> +       if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
>                 reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
>                       AUX_HW_RETRY_COUNT_SEL(3) |
>                       AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 7f6a55c..2bc8a7e 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -270,7 +270,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
>
>         dp->plat_data.encoder = &dp->encoder;
>
> -       dp->plat_data.dev_type = RK3288_DP;
> +       dp->plat_data.dev_type = ROCKCHIP_DP;
>         dp->plat_data.power_on = rockchip_dp_poweron;
>         dp->plat_data.power_off = rockchip_dp_powerdown;
>
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index 25afb31..9e5d013 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -15,7 +15,7 @@
>
>  enum analogix_dp_devtype {
>         EXYNOS_DP,
> -       RK3288_DP,
> +       ROCKCHIP_DP,
>  };
>
>  struct analogix_dp_plat_data {
> --
> 1.9.1
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

Patch
diff mbox

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 7699597..4a1b3b8 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1207,9 +1207,9 @@  static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
 	struct video_info *video_info = &dp->video_info;
 
 	switch (dp->plat_data->dev_type) {
-	case RK3288_DP:
+	case ROCKCHIP_DP:
 		/*
-		 * Like Rk3288 DisplayPort TRM indicate that "Main link
+		 * Like Rockchip DisplayPort TRM indicate that "Main link
 		 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
 		 */
 		video_info->max_link_rate = 0x0A;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 49205ef..931a76c 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -74,7 +74,7 @@  void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
 	reg = SEL_24M | TX_DVDD_BIT_1_0625V;
 	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
 
-	if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) {
 		writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
 		writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
 		writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
@@ -244,7 +244,7 @@  void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 	u32 reg;
 	u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
 
-	if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
 		phy_pd_addr = ANALOGIX_DP_PD;
 
 	switch (block) {
@@ -448,7 +448,7 @@  void analogix_dp_init_aux(struct analogix_dp_device *dp)
 	analogix_dp_reset_aux(dp);
 
 	/* Disable AUX transaction H/W retry */
-	if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
 		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
 		      AUX_HW_RETRY_COUNT_SEL(3) |
 		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 7f6a55c..2bc8a7e 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -270,7 +270,7 @@  static int rockchip_dp_bind(struct device *dev, struct device *master,
 
 	dp->plat_data.encoder = &dp->encoder;
 
-	dp->plat_data.dev_type = RK3288_DP;
+	dp->plat_data.dev_type = ROCKCHIP_DP;
 	dp->plat_data.power_on = rockchip_dp_poweron;
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 25afb31..9e5d013 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -15,7 +15,7 @@ 
 
 enum analogix_dp_devtype {
 	EXYNOS_DP,
-	RK3288_DP,
+	ROCKCHIP_DP,
 };
 
 struct analogix_dp_plat_data {