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[3/4] drm/i915/hsw: Avoid early timeout during LCPLL disable/restore

Message ID 1467110253-16046-4-git-send-email-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Imre Deak June 28, 2016, 10:37 a.m. UTC
Since wait_for_atomic doesn't re-check the wait-for condition after
expiry of the timeout it can fail when called from non-atomic context
even if the condition is set correctly before the expiry. Fix this by
using the non-atomic wait_for instead.

Fixes: 0351b93992aa ("drm/i915: Do not lie about atomic timeout granularity")
CC: Chris Wilson <chris@chris-wilson.co.uk>
CC: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Tvrtko Ursulin June 28, 2016, 11:17 a.m. UTC | #1
On 28/06/16 11:37, Imre Deak wrote:
> Since wait_for_atomic doesn't re-check the wait-for condition after
> expiry of the timeout it can fail when called from non-atomic context
> even if the condition is set correctly before the expiry. Fix this by
> using the non-atomic wait_for instead.
>
> Fixes: 0351b93992aa ("drm/i915: Do not lie about atomic timeout granularity")
> CC: Chris Wilson <chris@chris-wilson.co.uk>
> CC: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_display.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0312472..d902a70 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9534,8 +9534,8 @@ static void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
>   		val |= LCPLL_CD_SOURCE_FCLK;
>   		I915_WRITE(LCPLL_CTL, val);
>
> -		if (wait_for_atomic_us(I915_READ(LCPLL_CTL) &
> -				       LCPLL_CD_SOURCE_FCLK_DONE, 1))
> +		if (wait_for_us(I915_READ(LCPLL_CTL) &
> +				LCPLL_CD_SOURCE_FCLK_DONE, 1))
>   			DRM_ERROR("Switching to FCLK failed\n");
>
>   		val = I915_READ(LCPLL_CTL);
> @@ -9608,8 +9608,8 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
>   		val &= ~LCPLL_CD_SOURCE_FCLK;
>   		I915_WRITE(LCPLL_CTL, val);
>
> -		if (wait_for_atomic_us((I915_READ(LCPLL_CTL) &
> -					LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
> +		if (wait_for_us((I915_READ(LCPLL_CTL) &
> +				 LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
>   			DRM_ERROR("Switching back to LCPLL failed\n");
>   	}
>
>

This one is also on a mutex-taking path so looks correct to me.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Since it just a 1us timeout, as I wrote in another reply I can follow up 
with a patch to implement those more efficiently. Does not make anything 
worse in the meantime unless operation times out which is not critical.

Regards,

Tvrtko
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0312472..d902a70 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9534,8 +9534,8 @@  static void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
 		val |= LCPLL_CD_SOURCE_FCLK;
 		I915_WRITE(LCPLL_CTL, val);
 
-		if (wait_for_atomic_us(I915_READ(LCPLL_CTL) &
-				       LCPLL_CD_SOURCE_FCLK_DONE, 1))
+		if (wait_for_us(I915_READ(LCPLL_CTL) &
+				LCPLL_CD_SOURCE_FCLK_DONE, 1))
 			DRM_ERROR("Switching to FCLK failed\n");
 
 		val = I915_READ(LCPLL_CTL);
@@ -9608,8 +9608,8 @@  static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
 		val &= ~LCPLL_CD_SOURCE_FCLK;
 		I915_WRITE(LCPLL_CTL, val);
 
-		if (wait_for_atomic_us((I915_READ(LCPLL_CTL) &
-					LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
+		if (wait_for_us((I915_READ(LCPLL_CTL) &
+				 LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
 			DRM_ERROR("Switching back to LCPLL failed\n");
 	}