From patchwork Wed Jun 29 09:15:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yakir Yang X-Patchwork-Id: 9204605 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BB54A60757 for ; Wed, 29 Jun 2016 09:23:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A69B728455 for ; Wed, 29 Jun 2016 09:23:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9703828636; Wed, 29 Jun 2016 09:23:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5988528455 for ; Wed, 29 Jun 2016 09:23:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752025AbcF2JPP (ORCPT ); Wed, 29 Jun 2016 05:15:15 -0400 Received: from lucky1.263xmail.com ([211.157.147.135]:53966 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751806AbcF2JPN (ORCPT ); Wed, 29 Jun 2016 05:15:13 -0400 Received: from ykk?rock-chips.com (unknown [192.168.167.128]) by lucky1.263xmail.com (Postfix) with SMTP id 91FAD74E; Wed, 29 Jun 2016 17:15:05 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 32B81264B8; Wed, 29 Jun 2016 17:14:58 +0800 (CST) X-RL-SENDER: ykk@rock-chips.com X-FST-TO: yzq@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: <263ee747c4b70fef6f1eca340999512c> X-ATTACHMENT-NUM: 0 X-SENDER: ykk@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 24871HN2I93; Wed, 29 Jun 2016 17:15:00 +0800 (CST) From: Yakir Yang To: Mark Yao , Inki Dae , Jingoo Han , Heiko Stuebner Cc: Javier Martinez Canillas , =?UTF-8?q?St=C3=A9phane=20Marchesin?= , Sean Paul , Tomasz Figa , David Airlie , daniel.vetter@ffwll.ch, Thierry Reding , dianders@chromium.org, Krzysztof Kozlowski , emil.l.velikov@gmail.com, Dan Carpenter , Yakir Yang , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v4 01/11] drm/rockchip: analogix_dp: split the lcdc select setting into device data Date: Wed, 29 Jun 2016 17:15:01 +0800 Message-Id: <1467191701-17134-1-git-send-email-ykk@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467191657-16941-1-git-send-email-ykk@rock-chips.com> References: <1467191657-16941-1-git-send-email-ykk@rock-chips.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP eDP controller need to declare which vop provide the video source, and it's defined in GRF registers. But different chips have different GRF register address, so we need to create a device data to declare the GRF messages for each chips. Signed-off-by: Yakir Yang Acked-by: Mark Yao Reviewed-by: Tomasz Figa Reviewed-by: Sean Paul --- Changes in v4: - Assigned the GRF setting magic numbers to a #define that corresponds to a TRM name. (Sean & Heiko) - Pass the chip type to device type directly. (Sean) - Add reviewed flag from Tomasz. Changes in v3: - Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit) [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39] - Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit) [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382] - Add acked flag from Mark. drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 49 ++++++++++++++++++++----- 1 file changed, 39 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index c120172..0a30931 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -33,13 +34,26 @@ #include "rockchip_drm_drv.h" #include "rockchip_drm_vop.h" +#define RK3288_GRF_SOC_CON6 0x25c +#define RK3288_EDP_LCDC_SEL BIT(5) + +#define HIWORD_UPDATE(val, mask) (val | (mask) << 16) + #define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm) -/* dp grf register offset */ -#define GRF_SOC_CON6 0x025c -#define GRF_EDP_LCD_SEL_MASK BIT(5) -#define GRF_EDP_SEL_VOP_LIT BIT(5) -#define GRF_EDP_SEL_VOP_BIG 0 +/** + * struct rockchip_dp_chip_data - splite the grf setting of kind of chips + * @lcdsel_grf_reg: grf register offset of lcdc select + * @lcdsel_big: reg value of selecting vop big for eDP + * @lcdsel_lit: reg value of selecting vop little for eDP + * @chip_type: specific chip type + */ +struct rockchip_dp_chip_data { + u32 lcdsel_grf_reg; + u32 lcdsel_big; + u32 lcdsel_lit; + u32 chip_type; +}; struct rockchip_dp_device { struct drm_device *drm_dev; @@ -51,6 +65,8 @@ struct rockchip_dp_device { struct regmap *grf; struct reset_control *rst; + const struct rockchip_dp_chip_data *data; + struct analogix_dp_plat_data plat_data; }; @@ -119,13 +135,13 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder) return; if (ret) - val = GRF_EDP_SEL_VOP_LIT | (GRF_EDP_LCD_SEL_MASK << 16); + val = dp->data->lcdsel_lit; else - val = GRF_EDP_SEL_VOP_BIG | (GRF_EDP_LCD_SEL_MASK << 16); + val = dp->data->lcdsel_big; dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG"); - ret = regmap_write(dp->grf, GRF_SOC_CON6, val); + ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val); if (ret != 0) { dev_err(dp->dev, "Could not write to GRF: %d\n", ret); return; @@ -246,6 +262,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master, void *data) { struct rockchip_dp_device *dp = dev_get_drvdata(dev); + const struct rockchip_dp_chip_data *dp_data; struct drm_device *drm_dev = data; int ret; @@ -256,10 +273,15 @@ static int rockchip_dp_bind(struct device *dev, struct device *master, */ dev_set_drvdata(dev, NULL); + dp_data = of_device_get_match_data(dev); + if (!dp_data) + return -ENODEV; + ret = rockchip_dp_init(dp); if (ret < 0) return ret; + dp->data = dp_data; dp->drm_dev = drm_dev; ret = rockchip_dp_drm_create_encoder(dp); @@ -270,7 +292,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master, dp->plat_data.encoder = &dp->encoder; - dp->plat_data.dev_type = RK3288_DP; + dp->plat_data.dev_type = dp->data->chip_type; dp->plat_data.power_on = rockchip_dp_poweron; dp->plat_data.power_off = rockchip_dp_powerdown; @@ -356,8 +378,15 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = { #endif }; +static const struct rockchip_dp_chip_data rk3288_dp = { + .lcdsel_grf_reg = RK3288_GRF_SOC_CON6, + .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL), + .lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL), + .chip_type = RK3288_DP, +}; + static const struct of_device_id rockchip_dp_dt_ids[] = { - {.compatible = "rockchip,rk3288-dp",}, + {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp }, {} }; MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);