[01/13] drm/i915: Consolidate write_tail vfunc initializer
diff mbox

Message ID 1467212972-861-1-git-send-email-tvrtko.ursulin@linux.intel.com
State New
Headers show

Commit Message

Tvrtko Ursulin June 29, 2016, 3:09 p.m. UTC
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Introduce a function which initializes vfuncs mostly common
across engines and move write_tail initialization in it since
only one engine overrides the default.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 27 +++++++++++++++++++--------
 1 file changed, 19 insertions(+), 8 deletions(-)

Comments

Tvrtko Ursulin June 30, 2016, 8:44 a.m. UTC | #1
On 30/06/16 06:20, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [01/13] drm/i915: Consolidate write_tail vfunc initializer (rev2)
> URL   : https://patchwork.freedesktop.org/series/9279/
> State : warning
>
> == Summary ==
>
> Series 9279v2 Series without cover letter
> http://patchwork.freedesktop.org/api/1.0/series/9279/revisions/2/mbox
>
> Test gem_exec_flush:
>          Subgroup basic-batch-kernel-default-cmd:
>                  fail       -> PASS       (ro-byt-n2820)
> Test kms_flip:
>          Subgroup basic-flip-vs-dpms:
>                  pass       -> DMESG-WARN (ro-byt-n2820)

Looks like https://bugs.freedesktop.org/show_bug.cgi?id=95125

> Test kms_pipe_crc_basic:
>          Subgroup suspend-read-crc-pipe-b:
>                  dmesg-warn -> SKIP       (ro-bdw-i5-5250u)
>          Subgroup suspend-read-crc-pipe-c:
>                  dmesg-warn -> SKIP       (ro-bdw-i5-5250u)
>
> fi-skl-i5-6260u  total:229  pass:202  dwarn:0   dfail:0   fail:2   skip:25
> fi-snb-i7-2600   total:229  pass:174  dwarn:0   dfail:0   fail:2   skip:53
> ro-bdw-i5-5250u  total:229  pass:202  dwarn:1   dfail:1   fail:2   skip:23
> ro-bdw-i7-5600u  total:229  pass:190  dwarn:0   dfail:1   fail:0   skip:38
> ro-bsw-n3050     total:229  pass:176  dwarn:1   dfail:1   fail:2   skip:49
> ro-byt-n2820     total:229  pass:178  dwarn:1   dfail:1   fail:4   skip:45
> ro-hsw-i3-4010u  total:229  pass:195  dwarn:0   dfail:1   fail:2   skip:31
> ro-hsw-i7-4770r  total:229  pass:195  dwarn:0   dfail:1   fail:2   skip:31
> ro-ilk-i7-620lm  total:229  pass:155  dwarn:0   dfail:1   fail:3   skip:70
> ro-ilk1-i5-650   total:224  pass:155  dwarn:0   dfail:1   fail:3   skip:65
> ro-ivb-i7-3770   total:229  pass:186  dwarn:0   dfail:1   fail:2   skip:40
> ro-ivb2-i7-3770  total:229  pass:190  dwarn:0   dfail:1   fail:2   skip:36
> ro-skl3-i5-6260u total:229  pass:206  dwarn:1   dfail:1   fail:2   skip:19
> ro-snb-i7-2620M  total:229  pass:179  dwarn:0   dfail:1   fail:1   skip:48
> fi-kbl-qkkr failed to connect after reboot
> fi-skl-i7-6700k failed to connect after reboot
> ro-bdw-i7-5557U failed to connect after reboot
>
> Results at /archive/results/CI_IGT_test/RO_Patchwork_1335/
>
> 8a6521c drm-intel-nightly: 2016y-06m-29d-16h-08m-16s UTC integration manifest
> 5a0b3b6 drm/i915: Trim some if-else braces
> 6546565 drm/i915: Consolidate legacy semaphore initialization
> 7cd391c drm/i915: Compact gen8_ring_sync
> c36607f drm/i915: Compact Gen8 semaphore initialization
> e862990 drm/i915: Move semaphore object creation into intel_ring_init_semaphores
> 2168bca drm/i915: Consolidate semaphore vfuncs init
> af5b4cc drm/i915: Consolidate dispatch_execbuffer vfunc
> 0c72cfa drm/i915: Consolidate init_hw vfunc
> 2cb2fab drm/i915: Consolidate get/set_seqno
> 6e3bbdc drm/i915: Consolidate get and put irq vfuncs
> 24b7851 drm/i915: Consolidate seqno_barrier vfunc
> 0bd03a1 drm/i915: Consolidate add_request vfunc
> 42e13b2 drm/i915: Consolidate write_tail vfunc initializer

Looks good for merge. Just one r-b missing on v3 7/13.

Regards,

Tvrtko

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 04a2d141e690..b715707947d8 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2873,6 +2873,12 @@  static int gen6_ring_flush(struct drm_i915_gem_request *req,
 	return 0;
 }
 
+static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv,
+				      struct intel_engine_cs *engine)
+{
+	engine->write_tail = ring_write_tail;
+}
+
 int intel_init_render_ring_buffer(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2886,6 +2892,8 @@  int intel_init_render_ring_buffer(struct drm_device *dev)
 	engine->hw_id = 0;
 	engine->mmio_base = RENDER_RING_BASE;
 
+	intel_ring_default_vfuncs(dev_priv, engine);
+
 	if (INTEL_GEN(dev_priv) >= 8) {
 		if (i915_semaphore_is_enabled(dev_priv)) {
 			obj = i915_gem_object_create(dev, 4096);
@@ -2977,7 +2985,6 @@  int intel_init_render_ring_buffer(struct drm_device *dev)
 		}
 		engine->irq_enable_mask = I915_USER_INTERRUPT;
 	}
-	engine->write_tail = ring_write_tail;
 
 	if (IS_HASWELL(dev_priv))
 		engine->dispatch_execbuffer = hsw_ring_dispatch_execbuffer;
@@ -3036,7 +3043,8 @@  int intel_init_bsd_ring_buffer(struct drm_device *dev)
 	engine->exec_id = I915_EXEC_BSD;
 	engine->hw_id = 1;
 
-	engine->write_tail = ring_write_tail;
+	intel_ring_default_vfuncs(dev_priv, engine);
+
 	if (INTEL_GEN(dev_priv) >= 6) {
 		engine->mmio_base = GEN6_BSD_RING_BASE;
 		/* gen6 bsd needs a special wa for tail updates */
@@ -3114,9 +3122,10 @@  int intel_init_bsd2_ring_buffer(struct drm_device *dev)
 	engine->id = VCS2;
 	engine->exec_id = I915_EXEC_BSD;
 	engine->hw_id = 4;
-
-	engine->write_tail = ring_write_tail;
 	engine->mmio_base = GEN8_BSD2_RING_BASE;
+
+	intel_ring_default_vfuncs(dev_priv, engine);
+
 	engine->flush = gen6_bsd_ring_flush;
 	engine->add_request = gen6_add_request;
 	engine->irq_seqno_barrier = gen6_seqno_barrier;
@@ -3147,9 +3156,10 @@  int intel_init_blt_ring_buffer(struct drm_device *dev)
 	engine->id = BCS;
 	engine->exec_id = I915_EXEC_BLT;
 	engine->hw_id = 2;
-
 	engine->mmio_base = BLT_RING_BASE;
-	engine->write_tail = ring_write_tail;
+
+	intel_ring_default_vfuncs(dev_priv, engine);
+
 	engine->flush = gen6_ring_flush;
 	engine->add_request = gen6_add_request;
 	engine->irq_seqno_barrier = gen6_seqno_barrier;
@@ -3207,9 +3217,10 @@  int intel_init_vebox_ring_buffer(struct drm_device *dev)
 	engine->id = VECS;
 	engine->exec_id = I915_EXEC_VEBOX;
 	engine->hw_id = 3;
-
 	engine->mmio_base = VEBOX_RING_BASE;
-	engine->write_tail = ring_write_tail;
+
+	intel_ring_default_vfuncs(dev_priv, engine);
+
 	engine->flush = gen6_ring_flush;
 	engine->add_request = gen6_add_request;
 	engine->irq_seqno_barrier = gen6_seqno_barrier;