diff mbox

[v3,03/10] drm/imx: atomic phase 1: Use transitional atomic CRTC and plane helpers

Message ID 20160813150004.GA12419@n2100.armlinux.org.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Russell King (Oracle) Aug. 13, 2016, 3 p.m. UTC
On Sat, Aug 13, 2016 at 03:09:10PM +0100, Russell King - ARM Linux wrote:
> Okay, this is what I've ended up with - I'm not sure whether it's
> correct or not, but this dirty patch allows the full series to be
> applied and still have working userspace.
> 
> I still need to undo all the reverts I have touching imx-drm between
> patch 10 of this set and 4.8-rc1...

I tried a slightly different approach, so we at least get the simple
plane updates without having to go through the disable path:


but unfortunately this leads to a kernel oops.  From what I can tell,
lock->class_cache[subclass] was 0xffffffff.  subclass was 0, lock
was 0xec58631c.

[drm:drm_atomic_helper_commit_cleanup_done] *ERROR* [CRTC:24:crtc-0] flip_done timed out
Alignment trap: not handling instruction e1921f9f at [<c007fe4c>][  651.472496] Unhandled fault: alignment exception (0x001) at 0x00000103
pgd = ecea4000
[00000103] *pgd=00000000
Internal error: : 1 [#1] SMP ARM
Modules linked in: bnep rfcomm bluetooth nfsd rc_cec snd_soc_fsl_spdif caam_jr coda imx_pcm_dma imx_sdma v4l2_mem2mem videobuf2_dma_contig imx2_wdt videobuf2_vmalloc dw_hdmi_cec imx_thermal dw_hdmi_ahb_audio videobuf2_memops caam etnaviv snd_soc_imx_spdif
CPU: 0 PID: 1091 Comm: dbus-daemon Not tainted 4.8.0-rc1+ #2043
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
task: ee3755c0 task.stack: ece74000
PC is at __lock_acquire+0xd4/0x18fc
LR is at lock_acquire+0xd8/0x250
pc : [<c007fe50>]    lr : [<c0081bd0>]    psr: a0070193
sp : ece75730  ip : ece74000  fp : ece757b4
r10: 00000000  r9 : c0acbef0  r8 : ec58631c
r7 : 00000001  r6 : ee3755c0  r5 : c0a925f8  r4 : c125ad8c
r3 : 00000000  r2 : 00000103  r1 : 00000000  r0 : ffffffff
Flags: NzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment none
Control: 10c5387d  Table: 3cea404a  DAC: 00000051
Process dbus-daemon (pid: 1091, stack limit = 0xece74210)
Stack: (0xece75730 to 0xece76000)
(omitted)
Backtrace:
[<c007fd7c>] (__lock_acquire) from [<c0081bd0>] (lock_acquire+0xd8/0x250)
 r10:00000000 r9:c0acbef0 r8:00000000 r7:00000000 r6:ec58631c r5:60070193
 r4:00000000
[<c0081af8>] (lock_acquire) from [<c074d9cc>] (_raw_spin_lock_irqsave+0x4c/0x60)
 r10:ee1ca000 r9:0000040a r8:00000000 r7:00000000 r6:c007a48c r5:a0070193
 r4:ec58630c
[<c074d980>] (_raw_spin_lock_irqsave) from [<c007a48c>] (complete_all+0x1c/0x4c)
 r6:c0acdd18 r5:ec586308 r4:ec58630c
[<c007a470>] (complete_all) from [<c03fb480>] (drm_send_event_locked+0x30/0x104)
 r6:c0acdd18 r5:c0acb61d r4:ebc57200 r3:04240423
[<c03fb450>] (drm_send_event_locked) from [<c03fe4ac>] (send_vblank_event+0x94/0x1bc)
 r5:c0acb61d r4:ebc57200
[<c03fe418>] (send_vblank_event) from [<c03feda0>] (drm_handle_vblank+0x158/0x364)
 r10:ee1ca23c r9:ee1ca234 r8:0000040a r7:ee1ca000 r6:00000000 r5:ee1ca228
 r4:ebc57200
[<c03fec48>] (drm_handle_vblank) from [<c03fefc8>] (drm_crtc_handle_vblank+0x1c/0x20)
 r10:ece75964 r9:c0a3d554 r8:00000000 r7:0000012f r6:ee114a10 r5:ee114a00
 r4:ee055940
[<c03fefac>] (drm_crtc_handle_vblank) from [<c041ace4>] (imx_drm_handle_vblank+0x14/0x18)
[<c041acd0>] (imx_drm_handle_vblank) from [<c041b4c8>] (ipu_irq_handler+0x14/0x1c)
[<c041b4b4>] (ipu_irq_handler) from [<c0096630>] (__handle_irq_event_percpu+0xa4/0x428)
[<c009658c>] (__handle_irq_event_percpu) from [<c00969d8>] (handle_irq_event_percpu+0x24/0x60)
 r10:ece75ab0 r9:f4001100 r8:00000009 r7:00000000 r6:ee114a10 r5:ee114a00
 r4:ee114a00
[<c00969b4>] (handle_irq_event_percpu) from [<c0096a54>] (handle_irq_event+0x40/0x64)
 r5:ee114a60 r4:ee114a00
[<c0096a14>] (handle_irq_event) from [<c009a1c4>] (handle_level_irq+0xb0/0x138)
 r6:ee114a10 r5:ee114a60 r4:ee114a00 r3:c0a323d8
[<c009a114>] (handle_level_irq) from [<c0095df0>] (generic_handle_irq+0x20/0x30)
 r6:ee146810 r5:ece75a08 r4:00000017 r3:c009a114
[<c0095dd0>] (generic_handle_irq) from [<c041f344>] (ipu_irq_handle+0xa8/0xd8)
[<c041f29c>] (ipu_irq_handle) from [<c041f474>] (ipu_irq_handler+0x5c/0xb4)
 r8:ee820000 r7:00000026 r6:ee146810 r5:c0a44288 r4:eea46f10
[<c041f418>] (ipu_irq_handler) from [<c0095df0>] (generic_handle_irq+0x20/0x30)
 r6:00000000 r5:ece75c68 r4:c0a37240
[<c0095dd0>] (generic_handle_irq) from [<c0095f24>] (__handle_domain_irq+0x5c/0xb8)
[<c0095ec8>] (__handle_domain_irq) from [<c00094c8>] (gic_handle_irq+0x4c/0x9c)
 r8:c0a92950 r7:000003eb r6:c0a3dba4 r5:f400010c r4:f4000100 r3:ece75ab0
[<c000947c>] (gic_handle_irq) from [<c0014930>] (__irq_svc+0x70/0x98)
Exception stack(0xece75ab0 to 0xece75af8)
5aa0:                                     00000001 ee375a70 00000000 60070193
5ac0: 20070113 c0a4b910 00000001 00000002 00000002 c0a4b680 c0acbc34 ece75b14
5ae0: ece75ad0 ece75b00 c00821a0 c074e028 60070113 ffffffff
 r10:c0acbc34 r9:ece74000 r8:00000002 r7:ece75ae4 r6:ffffffff r5:60070113
 r4:c074e028 r3:ee3755c0
[<c074dfec>] (_raw_spin_unlock_irqrestore) from [<c007a388>] (swake_up+0x3c/0x40)
 r5:20070113 r4:c0a4b910
[<c007a34c>] (swake_up) from [<c00a0820>] (rcu_gp_kthread_wake+0x48/0x4c)
 r5:60070113 r4:eef85340
[<c00a07d8>] (rcu_gp_kthread_wake) from [<c00a2d98>] (rcu_process_callbacks+0x3a8/0x93c)
[<c00a29f0>] (rcu_process_callbacks) from [<c0034cb8>] (__do_softirq+0xe8/0x5e4)
 r10:c0acbc34 r9:00000024 r8:00000002 r7:00000002 r6:c0a3d554 r5:00000009
 r4:c0a3d0a4
[<c0034bd0>] (__do_softirq) from [<c0035534>] (irq_exit+0xe4/0x150)
 r10:ece75c68 r9:f4001100 r8:ee820000 r7:0000001d r6:00000000 r5:00000000
 r4:c0a37240
[<c0035450>] (irq_exit) from [<c0095f28>] (__handle_domain_irq+0x60/0xb8)
[<c0095ec8>] (__handle_domain_irq) from [<c00094c8>] (gic_handle_irq+0x4c/0x9c)
 r8:c0a92950 r7:000003eb r6:c0a3dba4 r5:f400010c r4:f4000100 r3:ece75c68
[<c000947c>] (gic_handle_irq) from [<c0014930>] (__irq_svc+0x70/0x98)
Exception stack(0xece75c68 to 0xece75cb0)
5c60:                   00000001 ece75eb0 ece75ca8 ee765748 ee765748 ee4357e8
5c80: ed7e9011 eeefa000 c0acb1f6 00002081 ece75eb0 ece75cf4 ece75cb8 ece75cb8
5ca0: c0181764 c0181838 60070013 ffffffff
 r10:ece75eb0 r9:ece74000 r8:c0acb1f6 r7:ece75c9c r6:ffffffff r5:60070013
 r4:c0181838 r3:ee3755c0
[<c0181724>] (__d_lookup_rcu) from [<c0171da0>] (lookup_fast+0x48/0x384)
 r10:ece75d5c r9:ee955910 r8:ece75d58 r7:ee4357e8 r6:00000000 r5:ece75d60
 r4:ece75ea8
[<c0171d58>] (lookup_fast) from [<c0174644>] (walk_component+0x34/0x284)
 r10:90954373 r9:ff010301 r8:ece75ea8 r7:00000001 r6:00000000 r5:2f727375
 r4:ece75ea8
[<c0174610>] (walk_component) from [<c0174a30>] (link_path_walk+0x19c/0x4b8)
 r7:ed7e9015 r6:ee4357e8 r5:2f727375 r4:7fffffff
[<c0174894>] (link_path_walk) from [<c017514c>] (path_openat+0x70/0xee0)
 r10:ece75ea8 r9:ece74000 r8:ece75f5c r7:00000003 r6:ece75ea8 r5:ece75f5c
 r4:00000046
[<c01750dc>] (path_openat) from [<c0176dd0>] (do_filp_open+0x68/0xbc)
 r10:00000000 r9:ece74000 r8:c000ff44 r7:00000003 r6:ece75ea8 r5:ece75f5c
 r4:00000046
[<c0176d68>] (do_filp_open) from [<c0165b4c>] (do_sys_open+0x120/0x1d4)
 r7:00000142 r6:ffffff9c r5:ed7e9000 r4:00000046
[<c0165a2c>] (do_sys_open) from [<c0165c3c>] (SyS_openat+0x14/0x18)
 r10:00000000 r8:c000ff44 r7:00000142 r6:801462c8 r5:bed94468 r4:80146450
[<c0165c28>] (SyS_openat) from [<c000fda0>] (ret_fast_syscall+0x0/0x1c)
Code: 0affffe9 e2802f41 f592f000 e1921f9f (e2811001)
---[ end trace 8ffd323ac322f062 ]---
diff mbox

Patch

diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 4ad67d015ec7..1cd3422e6e62 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -278,7 +278,7 @@  static int ipu_plane_atomic_check(struct drm_plane *plane,
 	if (WARN_ON(!crtc_state))
 		return -EINVAL;
 
-	/* CRTC should be enabled */
+	/* CRTC should be enabled -- why? */
 	if (!crtc_state->enable)
 		return -EINVAL;
 
@@ -322,10 +322,14 @@  static int ipu_plane_atomic_check(struct drm_plane *plane,
 	 * since we cannot touch active IDMAC channels, we do not support
 	 * resizing the enabled plane or changing its format
 	 */
+#if 0
 	if (old_fb && (state->src_w != old_state->src_w ||
 			      state->src_h != old_state->src_h ||
-			      fb->pixel_format != old_fb->pixel_format))
+			      fb->pixel_format != old_fb->pixel_format)) {
+		printk("%s:%d: fail\n", __func__, __LINE__);
 		return -EINVAL;
+	}
+#endif
 
 	eba = drm_plane_state_to_eba(state);
 
@@ -335,9 +339,6 @@  static int ipu_plane_atomic_check(struct drm_plane *plane,
 	if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
 		return -EINVAL;
 
-	if (old_fb && fb->pitches[0] != old_fb->pitches[0])
-		return -EINVAL;
-
 	switch (fb->pixel_format) {
 	case DRM_FORMAT_YUV420:
 	case DRM_FORMAT_YVU420:
@@ -391,11 +392,17 @@  static void ipu_plane_atomic_update(struct drm_plane *plane,
 	struct drm_plane_state *state = plane->state;
 	enum ipu_color_space ics;
 
-	if (old_state->fb) {
+	if (old_state->fb &&
+	    old_state->src_w == state->src_w &&
+	    old_state->src_h == state->src_h &&
+	    old_state->fb->pixel_format == state->fb->pixel_format &&
+	    old_state->fb->pitches[0] == state->fb->pitches[0]) {
 		ipu_plane_atomic_set_base(ipu_plane, old_state);
 		return;
 	}
 
+	ipu_plane_disable(ipu_plane);
+
 	switch (ipu_plane->dp_flow) {
 	case IPU_DP_FLOW_SYNC_BG:
 		ipu_dp_setup_channel(ipu_plane->dp,