| Message ID | 20160819215547.20063-5-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes: > From: Neil Armstrong <narmstrong@baylibre.com> > > Newer SoCs (Meson 8b and GXBB) are using REG2 (offset 0x20) instead of > REG1 to configure the decoder mode. This makes it necessary to > introduce new bindings so the driver knows which register has to be > used. > > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Mauro, are you the one to pick up new media/rc drivers? Or if you prefer, with your ack, I'll take this along with the DT and submit via arm-soc. Thanks, Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Em Fri, 19 Aug 2016 15:28:22 -0700 Kevin Hilman <khilman@baylibre.com> escreveu: > Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes: > > > From: Neil Armstrong <narmstrong@baylibre.com> > > > > Newer SoCs (Meson 8b and GXBB) are using REG2 (offset 0x20) instead of > > REG1 to configure the decoder mode. This makes it necessary to > > introduce new bindings so the driver knows which register has to be > > used. > > > > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > > Acked-by: Kevin Hilman <khilman@baylibre.com> > > Mauro, are you the one to pick up new media/rc drivers? Or if you > prefer, with your ack, I'll take this along with the DT and submit via > arm-soc. I generally pick new media rc drivers, but in the specific case of this patchset, it is just adding a few extra lines to existing drivers, and most of the work are actually at the ARM tree. So, feel free to merge via arm-soc with my ack: Acked-by: Mauro Carvalho Chehab <mchehab@s-opensource.com> > > Thanks, > > Kevin > -- > To unsubscribe from this list: send the line "unsubscribe linux-media" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html Thanks, Mauro -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c index fcc3b82..003fff0 100644 --- a/drivers/media/rc/meson-ir.c +++ b/drivers/media/rc/meson-ir.c @@ -24,6 +24,7 @@ #define DRIVER_NAME "meson-ir" +/* valid on all Meson platforms */ #define IR_DEC_LDR_ACTIVE 0x00 #define IR_DEC_LDR_IDLE 0x04 #define IR_DEC_LDR_REPEAT 0x08 @@ -32,12 +33,21 @@ #define IR_DEC_FRAME 0x14 #define IR_DEC_STATUS 0x18 #define IR_DEC_REG1 0x1c +/* only available on Meson 8b and newer */ +#define IR_DEC_REG2 0x20 #define REG0_RATE_MASK (BIT(11) - 1) -#define REG1_MODE_MASK (BIT(7) | BIT(8)) -#define REG1_MODE_NEC (0 << 7) -#define REG1_MODE_GENERAL (2 << 7) +#define DECODE_MODE_NEC 0x0 +#define DECODE_MODE_RAW 0x2 + +/* Meson 6b uses REG1 to configure the mode */ +#define REG1_MODE_MASK GENMASK(8, 7) +#define REG1_MODE_SHIFT 7 + +/* Meson 8b / GXBB use REG2 to configure the mode */ +#define REG2_MODE_MASK GENMASK(3, 0) +#define REG2_MODE_SHIFT 0 #define REG1_TIME_IV_SHIFT 16 #define REG1_TIME_IV_MASK ((BIT(13) - 1) << REG1_TIME_IV_SHIFT) @@ -158,8 +168,15 @@ static int meson_ir_probe(struct platform_device *pdev) /* Reset the decoder */ meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET); meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0); - /* Set general operation mode */ - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK, REG1_MODE_GENERAL); + + /* Set general operation mode (= raw/software decoding) */ + if (of_device_is_compatible(node, "amlogic,meson6-ir")) + meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK, + DECODE_MODE_RAW << REG1_MODE_SHIFT); + else + meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK, + DECODE_MODE_RAW << REG2_MODE_SHIFT); + /* Set rate */ meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1); /* IRQ on rising and falling edges */ @@ -197,6 +214,8 @@ static int meson_ir_remove(struct platform_device *pdev) static const struct of_device_id meson_ir_match[] = { { .compatible = "amlogic,meson6-ir" }, + { .compatible = "amlogic,meson8b-ir" }, + { .compatible = "amlogic,meson-gxbb-ir" }, { }, };