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[v4,06/25] drm/i915/slpc: Sanitize SLPC version

Message ID 1473236583-11533-7-git-send-email-sagar.a.kamble@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

sagar.a.kamble@intel.com Sept. 7, 2016, 8:22 a.m. UTC 
From: Tom O'Rourke <Tom.O'Rourke@intel.com>

The SLPC interface has changed and could continue to
change.  Only GuC versions known to be compatible are
supported here.

On Skylake, GuC firmware v9 is supported.  Other
platforms and versions can be added here later.

v1: Updated with modified sanitize_slpc_option in earlier patch.

v2-v3: Rebase.

v4: Updated support for GuC firmware v9.

Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_loader.c | 5 +++++
 1 file changed, 5 insertions(+)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index fb38018..500b0b6 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -146,6 +146,8 @@  static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
 
 void sanitize_slpc_option(struct drm_i915_private *dev_priv)
 {
+	struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
+
 	/* Handle default case */
 	if (i915.enable_slpc < 0)
 		i915.enable_slpc = HAS_SLPC(dev_priv);
@@ -161,6 +163,9 @@  void sanitize_slpc_option(struct drm_i915_private *dev_priv)
 	/* slpc requires guc submission */
 	if (!i915.enable_guc_submission)
 		i915.enable_slpc = 0;
+
+	if (IS_SKYLAKE(dev_priv) && (guc_fw->guc_fw_major_found != 9))
+		i915.enable_slpc = 0;
 }
 
 static u32 get_gttype(struct drm_i915_private *dev_priv)