diff mbox

[v4,19/25] drm/i915/slpc: Add Broxton SLPC support

Message ID 1473236583-11533-20-git-send-email-sagar.a.kamble@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

sagar.a.kamble@intel.com Sept. 7, 2016, 8:22 a.m. UTC 
From: Tom O'Rourke <Tom.O'Rourke@intel.com>

Adds has_slpc to broxton info and adds broxton firmware version check
to sanitize_slpc_option.

v1: Adjusted slpc version check for major version 8.
    Added message if version mismatch happens for easier debug. (Sagar)

v2-v3: Rebase.

v4: Commit message update.

Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c         | 1 +
 drivers/gpu/drm/i915/intel_guc_loader.c | 5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e678051..60a5eb5 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -342,6 +342,7 @@  static const struct intel_device_info intel_broxton_info = {
 	.has_ddi = 1,
 	.has_fpga_dbg = 1,
 	.has_fbc = 1,
+	.has_slpc = 1,
 	.has_pooled_eu = 0,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 2dda771..f0101a8 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -164,8 +164,11 @@  void sanitize_slpc_option(struct drm_i915_private *dev_priv)
 	if (!i915.enable_guc_submission)
 		i915.enable_slpc = 0;
 
-	if (IS_SKYLAKE(dev_priv) && (guc_fw->guc_fw_major_found != 9))
+	if ((IS_SKYLAKE(dev_priv) && (guc_fw->guc_fw_major_found != 9))
+	     || (IS_BROXTON(dev_priv) && (guc_fw->guc_fw_major_found != 9))) {
+		DRM_INFO("SLPC not supported with current GuC firmware\n");
 		i915.enable_slpc = 0;
+	}
 }
 
 static u32 get_gttype(struct drm_i915_private *dev_priv)