diff mbox

drm: squash lines for simple wrapper functions

Message ID 1473203062-21731-1-git-send-email-yamada.masahiro@socionext.com (mailing list archive)
State New, archived
Headers show

Commit Message

Masahiro Yamada Sept. 6, 2016, 11:04 p.m. UTC
Remove unneeded variables and assignments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c             |  6 +-----
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c            |  6 +-----
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c            |  6 +-----
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 20 ++++----------------
 drivers/gpu/drm/drm_dp_mst_topology.c             |  7 ++-----
 drivers/gpu/drm/i915/i915_drv.c                   |  8 +-------
 drivers/gpu/drm/qxl/qxl_draw.c                    |  7 ++-----
 drivers/gpu/drm/qxl/qxl_release.c                 |  7 ++-----
 drivers/gpu/drm/radeon/cik.c                      |  6 +-----
 drivers/gpu/drm/radeon/r100.c                     |  6 +-----
 drivers/gpu/drm/radeon/r600.c                     |  6 +-----
 11 files changed, 17 insertions(+), 68 deletions(-)

Comments

Alex Deucher Sept. 7, 2016, 2:58 p.m. UTC | #1
> -----Original Message-----
> From: Masahiro Yamada [mailto:yamada.masahiro@socionext.com]
> Sent: Tuesday, September 06, 2016 7:04 PM
> To: David Airlie; dri-devel@lists.freedesktop.org
> Cc: Masahiro Yamada; Gustavo Padovan; Yakir Yang; Huang, Ray; Deucher,
> Alexander; Liu, Monk; Zhou, David(ChunMing); Daniel Vetter; Heiko
> Stuebner; Huang, JinHuiEric; Cui, Flora; Inki Dae; Krzysztof Kozlowski; Dave
> Airlie; Jani Nikula; intel-gfx@lists.freedesktop.org; Frediano Ziglio; Li, Samuel;
> Koenig, Christian; Tomasz Figa; Sumit Semwal; linux-kernel@vger.kernel.org;
> StDenis, Tom; Dan Carpenter
> Subject: [PATCH] drm: squash lines for simple wrapper functions
> 
> Remove unneeded variables and assignments.
> 
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Please split these up per driver.

Alex

> ---
> 
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c             |  6 +-----
>  drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c            |  6 +-----
>  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c            |  6 +-----
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 20 ++++----------------
>  drivers/gpu/drm/drm_dp_mst_topology.c             |  7 ++-----
>  drivers/gpu/drm/i915/i915_drv.c                   |  8 +-------
>  drivers/gpu/drm/qxl/qxl_draw.c                    |  7 ++-----
>  drivers/gpu/drm/qxl/qxl_release.c                 |  7 ++-----
>  drivers/gpu/drm/radeon/cik.c                      |  6 +-----
>  drivers/gpu/drm/radeon/r100.c                     |  6 +-----
>  drivers/gpu/drm/radeon/r600.c                     |  6 +-----
>  11 files changed, 17 insertions(+), 68 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index b818461..0d5307a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -5854,11 +5854,7 @@ static int gfx_v8_0_set_clockgating_state(void
> *handle,
> 
>  static u32 gfx_v8_0_ring_get_rptr_gfx(struct amdgpu_ring *ring)
>  {
> -	u32 rptr;
> -
> -	rptr = ring->adev->wb.wb[ring->rptr_offs];
> -
> -	return rptr;
> +	return ring->adev->wb.wb[ring->rptr_offs];
>  }
> 
>  static u32 gfx_v8_0_ring_get_wptr_gfx(struct amdgpu_ring *ring)
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> index a64715d..b165c78 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> @@ -190,12 +190,8 @@ out:
>   */
>  static uint32_t sdma_v2_4_ring_get_rptr(struct amdgpu_ring *ring)
>  {
> -	u32 rptr;
> -
>  	/* XXX check if swapping is necessary on BE */
> -	rptr = ring->adev->wb.wb[ring->rptr_offs] >> 2;
> -
> -	return rptr;
> +	return ring->adev->wb.wb[ring->rptr_offs] >> 2;
>  }
> 
>  /**
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> index 653ce5e..cf253b9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> @@ -335,12 +335,8 @@ out:
>   */
>  static uint32_t sdma_v3_0_ring_get_rptr(struct amdgpu_ring *ring)
>  {
> -	u32 rptr;
> -
>  	/* XXX check if swapping is necessary on BE */
> -	rptr = ring->adev->wb.wb[ring->rptr_offs] >> 2;
> -
> -	return rptr;
> +	return ring->adev->wb.wb[ring->rptr_offs] >> 2;
>  }
> 
>  /**
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 48030f0..d37d112 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -1073,34 +1073,22 @@ void analogix_dp_set_lane3_link_training(struct
> analogix_dp_device *dp,
> 
>  u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
>  {
> -	u32 reg;
> -
> -	reg = readl(dp->reg_base +
> ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
> -	return reg;
> +	return readl(dp->reg_base +
> ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
>  }
> 
>  u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
>  {
> -	u32 reg;
> -
> -	reg = readl(dp->reg_base +
> ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
> -	return reg;
> +	return readl(dp->reg_base +
> ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
>  }
> 
>  u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
>  {
> -	u32 reg;
> -
> -	reg = readl(dp->reg_base +
> ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
> -	return reg;
> +	return readl(dp->reg_base +
> ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
>  }
> 
>  u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
>  {
> -	u32 reg;
> -
> -	reg = readl(dp->reg_base +
> ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
> -	return reg;
> +	return readl(dp->reg_base +
> ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
>  }
> 
>  void analogix_dp_reset_macro(struct analogix_dp_device *dp)
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 04e4571..302bdcb 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -737,16 +737,13 @@ static void drm_dp_mst_put_payload_id(struct
> drm_dp_mst_topology_mgr *mgr,
>  static bool check_txmsg_state(struct drm_dp_mst_topology_mgr *mgr,
>  			      struct drm_dp_sideband_msg_tx *txmsg)
>  {
> -	bool ret;
> -
>  	/*
>  	 * All updates to txmsg->state are protected by mgr->qlock, and the
> two
>  	 * cases we check here are terminal states. For those the barriers
>  	 * provided by the wake_up/wait_event pair are enough.
>  	 */
> -	ret = (txmsg->state == DRM_DP_SIDEBAND_TX_RX ||
> -	       txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT);
> -	return ret;
> +	return txmsg->state == DRM_DP_SIDEBAND_TX_RX ||
> +	       txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT;
>  }
> 
>  static int drm_dp_mst_wait_tx_reply(struct drm_dp_mst_branch *mstb,
> diff --git a/drivers/gpu/drm/i915/i915_drv.c
> b/drivers/gpu/drm/i915/i915_drv.c
> index 95ddd56..59d029d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1361,13 +1361,7 @@ void i915_driver_unload(struct drm_device *dev)
> 
>  static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
>  {
> -	int ret;
> -
> -	ret = i915_gem_open(dev, file);
> -	if (ret)
> -		return ret;
> -
> -	return 0;
> +	return i915_gem_open(dev, file);
>  }
> 
>  /**
> diff --git a/drivers/gpu/drm/qxl/qxl_draw.c
> b/drivers/gpu/drm/qxl/qxl_draw.c
> index ffe8853..9b728ed 100644
> --- a/drivers/gpu/drm/qxl/qxl_draw.c
> +++ b/drivers/gpu/drm/qxl/qxl_draw.c
> @@ -57,11 +57,8 @@ static struct qxl_rect *drawable_set_clipping(struct
> qxl_device *qdev,
>  static int
>  alloc_drawable(struct qxl_device *qdev, struct qxl_release **release)
>  {
> -	int ret;
> -	ret = qxl_alloc_release_reserved(qdev, sizeof(struct qxl_drawable),
> -					 QXL_RELEASE_DRAWABLE, release,
> -					 NULL);
> -	return ret;
> +	return qxl_alloc_release_reserved(qdev, sizeof(struct
> qxl_drawable),
> +					  QXL_RELEASE_DRAWABLE, release,
> NULL);
>  }
> 
>  static void
> diff --git a/drivers/gpu/drm/qxl/qxl_release.c
> b/drivers/gpu/drm/qxl/qxl_release.c
> index f599cd0..cd83f05 100644
> --- a/drivers/gpu/drm/qxl/qxl_release.c
> +++ b/drivers/gpu/drm/qxl/qxl_release.c
> @@ -203,12 +203,9 @@ qxl_release_free(struct qxl_device *qdev,
>  static int qxl_release_bo_alloc(struct qxl_device *qdev,
>  				struct qxl_bo **bo)
>  {
> -	int ret;
>  	/* pin releases bo's they are too messy to evict */
> -	ret = qxl_bo_create(qdev, PAGE_SIZE, false, true,
> -			    QXL_GEM_DOMAIN_VRAM, NULL,
> -			    bo);
> -	return ret;
> +	return qxl_bo_create(qdev, PAGE_SIZE, false, true,
> +			     QXL_GEM_DOMAIN_VRAM, NULL, bo);
>  }
> 
>  int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo)
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 0c1b9ff..4da1140 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -4201,11 +4201,7 @@ u32 cik_gfx_get_rptr(struct radeon_device *rdev,
>  u32 cik_gfx_get_wptr(struct radeon_device *rdev,
>  		     struct radeon_ring *ring)
>  {
> -	u32 wptr;
> -
> -	wptr = RREG32(CP_RB0_WPTR);
> -
> -	return wptr;
> +	return RREG32(CP_RB0_WPTR);
>  }
> 
>  void cik_gfx_set_wptr(struct radeon_device *rdev,
> diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
> index f25994b..f5e84f4 100644
> --- a/drivers/gpu/drm/radeon/r100.c
> +++ b/drivers/gpu/drm/radeon/r100.c
> @@ -1071,11 +1071,7 @@ u32 r100_gfx_get_rptr(struct radeon_device
> *rdev,
>  u32 r100_gfx_get_wptr(struct radeon_device *rdev,
>  		      struct radeon_ring *ring)
>  {
> -	u32 wptr;
> -
> -	wptr = RREG32(RADEON_CP_RB_WPTR);
> -
> -	return wptr;
> +	return RREG32(RADEON_CP_RB_WPTR);
>  }
> 
>  void r100_gfx_set_wptr(struct radeon_device *rdev,
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index 9247e7d..f034687 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -2631,11 +2631,7 @@ u32 r600_gfx_get_rptr(struct radeon_device
> *rdev,
>  u32 r600_gfx_get_wptr(struct radeon_device *rdev,
>  		      struct radeon_ring *ring)
>  {
> -	u32 wptr;
> -
> -	wptr = RREG32(R600_CP_RB_WPTR);
> -
> -	return wptr;
> +	return RREG32(R600_CP_RB_WPTR);
>  }
> 
>  void r600_gfx_set_wptr(struct radeon_device *rdev,
> --
> 1.9.1
Masahiro Yamada Sept. 7, 2016, 3:09 p.m. UTC | #2
Hi Jani,


2016-09-07 17:34 GMT+09:00 Jani Nikula <jani.nikula@linux.intel.com>:
> On Wed, 07 Sep 2016, Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
>> Remove unneeded variables and assignments.
>>
>> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
>
> ...
>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>> index 95ddd56..59d029d 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.c
>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>> @@ -1361,13 +1361,7 @@ void i915_driver_unload(struct drm_device *dev)
>>
>>  static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
>>  {
>> -     int ret;
>> -
>> -     ret = i915_gem_open(dev, file);
>> -     if (ret)
>> -             return ret;
>> -
>> -     return 0;
>> +     return i915_gem_open(dev, file);
>>  }
>
> Seems to me the whole function could be replaced by a direct use of
> i915_gem_open().

Good catch.


Shall I send v2?

Or, should it be done in a separate follow-up patch?
(I hope you can do it in this case.)
diff mbox

Patch

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index b818461..0d5307a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5854,11 +5854,7 @@  static int gfx_v8_0_set_clockgating_state(void *handle,
 
 static u32 gfx_v8_0_ring_get_rptr_gfx(struct amdgpu_ring *ring)
 {
-	u32 rptr;
-
-	rptr = ring->adev->wb.wb[ring->rptr_offs];
-
-	return rptr;
+	return ring->adev->wb.wb[ring->rptr_offs];
 }
 
 static u32 gfx_v8_0_ring_get_wptr_gfx(struct amdgpu_ring *ring)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index a64715d..b165c78 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -190,12 +190,8 @@  out:
  */
 static uint32_t sdma_v2_4_ring_get_rptr(struct amdgpu_ring *ring)
 {
-	u32 rptr;
-
 	/* XXX check if swapping is necessary on BE */
-	rptr = ring->adev->wb.wb[ring->rptr_offs] >> 2;
-
-	return rptr;
+	return ring->adev->wb.wb[ring->rptr_offs] >> 2;
 }
 
 /**
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 653ce5e..cf253b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -335,12 +335,8 @@  out:
  */
 static uint32_t sdma_v3_0_ring_get_rptr(struct amdgpu_ring *ring)
 {
-	u32 rptr;
-
 	/* XXX check if swapping is necessary on BE */
-	rptr = ring->adev->wb.wb[ring->rptr_offs] >> 2;
-
-	return rptr;
+	return ring->adev->wb.wb[ring->rptr_offs] >> 2;
 }
 
 /**
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 48030f0..d37d112 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1073,34 +1073,22 @@  void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
 
 u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
 {
-	u32 reg;
-
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
-	return reg;
+	return readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
 }
 
 u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
 {
-	u32 reg;
-
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
-	return reg;
+	return readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
 }
 
 u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
 {
-	u32 reg;
-
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
-	return reg;
+	return readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
 }
 
 u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
 {
-	u32 reg;
-
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
-	return reg;
+	return readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
 }
 
 void analogix_dp_reset_macro(struct analogix_dp_device *dp)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index 04e4571..302bdcb 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -737,16 +737,13 @@  static void drm_dp_mst_put_payload_id(struct drm_dp_mst_topology_mgr *mgr,
 static bool check_txmsg_state(struct drm_dp_mst_topology_mgr *mgr,
 			      struct drm_dp_sideband_msg_tx *txmsg)
 {
-	bool ret;
-
 	/*
 	 * All updates to txmsg->state are protected by mgr->qlock, and the two
 	 * cases we check here are terminal states. For those the barriers
 	 * provided by the wake_up/wait_event pair are enough.
 	 */
-	ret = (txmsg->state == DRM_DP_SIDEBAND_TX_RX ||
-	       txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT);
-	return ret;
+	return txmsg->state == DRM_DP_SIDEBAND_TX_RX ||
+	       txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT;
 }
 
 static int drm_dp_mst_wait_tx_reply(struct drm_dp_mst_branch *mstb,
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 95ddd56..59d029d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1361,13 +1361,7 @@  void i915_driver_unload(struct drm_device *dev)
 
 static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
 {
-	int ret;
-
-	ret = i915_gem_open(dev, file);
-	if (ret)
-		return ret;
-
-	return 0;
+	return i915_gem_open(dev, file);
 }
 
 /**
diff --git a/drivers/gpu/drm/qxl/qxl_draw.c b/drivers/gpu/drm/qxl/qxl_draw.c
index ffe8853..9b728ed 100644
--- a/drivers/gpu/drm/qxl/qxl_draw.c
+++ b/drivers/gpu/drm/qxl/qxl_draw.c
@@ -57,11 +57,8 @@  static struct qxl_rect *drawable_set_clipping(struct qxl_device *qdev,
 static int
 alloc_drawable(struct qxl_device *qdev, struct qxl_release **release)
 {
-	int ret;
-	ret = qxl_alloc_release_reserved(qdev, sizeof(struct qxl_drawable),
-					 QXL_RELEASE_DRAWABLE, release,
-					 NULL);
-	return ret;
+	return qxl_alloc_release_reserved(qdev, sizeof(struct qxl_drawable),
+					  QXL_RELEASE_DRAWABLE, release, NULL);
 }
 
 static void
diff --git a/drivers/gpu/drm/qxl/qxl_release.c b/drivers/gpu/drm/qxl/qxl_release.c
index f599cd0..cd83f05 100644
--- a/drivers/gpu/drm/qxl/qxl_release.c
+++ b/drivers/gpu/drm/qxl/qxl_release.c
@@ -203,12 +203,9 @@  qxl_release_free(struct qxl_device *qdev,
 static int qxl_release_bo_alloc(struct qxl_device *qdev,
 				struct qxl_bo **bo)
 {
-	int ret;
 	/* pin releases bo's they are too messy to evict */
-	ret = qxl_bo_create(qdev, PAGE_SIZE, false, true,
-			    QXL_GEM_DOMAIN_VRAM, NULL,
-			    bo);
-	return ret;
+	return qxl_bo_create(qdev, PAGE_SIZE, false, true,
+			     QXL_GEM_DOMAIN_VRAM, NULL, bo);
 }
 
 int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 0c1b9ff..4da1140 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -4201,11 +4201,7 @@  u32 cik_gfx_get_rptr(struct radeon_device *rdev,
 u32 cik_gfx_get_wptr(struct radeon_device *rdev,
 		     struct radeon_ring *ring)
 {
-	u32 wptr;
-
-	wptr = RREG32(CP_RB0_WPTR);
-
-	return wptr;
+	return RREG32(CP_RB0_WPTR);
 }
 
 void cik_gfx_set_wptr(struct radeon_device *rdev,
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index f25994b..f5e84f4 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1071,11 +1071,7 @@  u32 r100_gfx_get_rptr(struct radeon_device *rdev,
 u32 r100_gfx_get_wptr(struct radeon_device *rdev,
 		      struct radeon_ring *ring)
 {
-	u32 wptr;
-
-	wptr = RREG32(RADEON_CP_RB_WPTR);
-
-	return wptr;
+	return RREG32(RADEON_CP_RB_WPTR);
 }
 
 void r100_gfx_set_wptr(struct radeon_device *rdev,
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 9247e7d..f034687 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2631,11 +2631,7 @@  u32 r600_gfx_get_rptr(struct radeon_device *rdev,
 u32 r600_gfx_get_wptr(struct radeon_device *rdev,
 		      struct radeon_ring *ring)
 {
-	u32 wptr;
-
-	wptr = RREG32(R600_CP_RB_WPTR);
-
-	return wptr;
+	return RREG32(R600_CP_RB_WPTR);
 }
 
 void r600_gfx_set_wptr(struct radeon_device *rdev,