| Message ID | 1476629958-25368-3-git-send-email-yamada.masahiro@socionext.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 16-10-16, 23:59, Masahiro Yamada wrote: > + cluster0_opp: opp_table { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp@245000000 { > + opp-hz = /bits/ 64 <245000000>; > + clock-latency-ns = <300>; > + }; > + opp@250000000 { > + opp-hz = /bits/ 64 <250000000>; > + clock-latency-ns = <300>; > + }; > + opp@490000000 { > + opp-hz = /bits/ 64 <490000000>; > + clock-latency-ns = <300>; > + }; > + opp@500000000 { > + opp-hz = /bits/ 64 <500000000>; > + clock-latency-ns = <300>; > + }; > + opp@653333333 { Why isn't ^^ matching with below values ? Same in next patch as well. > + opp-hz = /bits/ 64 <653334000>; > + clock-latency-ns = <300>; > + }; > + opp@666666666 { > + opp-hz = /bits/ 64 <666667000>; > + clock-latency-ns = <300>; > + }; > + opp@980000000 { > + opp-hz = /bits/ 64 <980000000>; > + clock-latency-ns = <300>; > + }; > + }; > + > clocks { > refclk: ref { > compatible = "fixed-clock"; > -- > 1.9.1
Hi Viresh, 2016-10-18 20:25 GMT+09:00 Viresh Kumar <viresh.kumar@linaro.org>: > On 16-10-16, 23:59, Masahiro Yamada wrote: >> + cluster0_opp: opp_table { >> + compatible = "operating-points-v2"; >> + opp-shared; >> + >> + opp@245000000 { >> + opp-hz = /bits/ 64 <245000000>; >> + clock-latency-ns = <300>; >> + }; >> + opp@250000000 { >> + opp-hz = /bits/ 64 <250000000>; >> + clock-latency-ns = <300>; >> + }; >> + opp@490000000 { >> + opp-hz = /bits/ 64 <490000000>; >> + clock-latency-ns = <300>; >> + }; >> + opp@500000000 { >> + opp-hz = /bits/ 64 <500000000>; >> + clock-latency-ns = <300>; >> + }; >> + opp@653333333 { > > Why isn't ^^ matching with below values ? Same in next patch as well. When I try to update /sys/devices/system/cpu/cpufreq/policy*/scaling_max_freq, it did not work as I had expected. scaling_max_freq is specified by kHz unit, on the other hand, clock frequency in the clk driver is specified by Hz. If the operating point is 653333kHz, the cpufreq requests the clk driver to set 653333000, but it is lower than the exact clock, 653333333. So, the next lower frequency, 500000000 is selected. As a result, the operating point 653333kHz is never enabled. So, the operating point must be equal or a little bit bigger. Do you know a better way to solve this distortion?
On 19-10-16, 17:33, Masahiro Yamada wrote: > Hi Viresh, > > > 2016-10-18 20:25 GMT+09:00 Viresh Kumar <viresh.kumar@linaro.org>: > > On 16-10-16, 23:59, Masahiro Yamada wrote: > >> + cluster0_opp: opp_table { > >> + compatible = "operating-points-v2"; > >> + opp-shared; > >> + > >> + opp@245000000 { > >> + opp-hz = /bits/ 64 <245000000>; > >> + clock-latency-ns = <300>; > >> + }; > >> + opp@250000000 { > >> + opp-hz = /bits/ 64 <250000000>; > >> + clock-latency-ns = <300>; > >> + }; > >> + opp@490000000 { > >> + opp-hz = /bits/ 64 <490000000>; > >> + clock-latency-ns = <300>; > >> + }; > >> + opp@500000000 { > >> + opp-hz = /bits/ 64 <500000000>; > >> + clock-latency-ns = <300>; > >> + }; > >> + opp@653333333 { > > > > Why isn't ^^ matching with below values ? Same in next patch as well. > > > > When I try to update /sys/devices/system/cpu/cpufreq/policy*/scaling_max_freq, > it did not work as I had expected. > > > scaling_max_freq is specified by kHz unit, > on the other hand, clock frequency in the clk driver is specified by Hz. > > > > If the operating point is 653333kHz, the cpufreq requests > the clk driver to set 653333000, but it is lower than > the exact clock, 653333333. > So, the next lower frequency, 500000000 is selected. > As a result, the operating point 653333kHz is never enabled. > > > So, the operating point must be equal or a little bit bigger. > > > Do you know a better way to solve this distortion? I am not sure about how to fix that problem but there is no reason to have the exact frequency in opp@*** name. Just use what you have used in opp-hz line and you will have the exact same behavior. Right now, its a bit confusing if we read the DT.
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 73e0acf..e3eb10f 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -70,14 +70,18 @@ device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x000>; + clocks = <&sys_clk 33>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x001>; + clocks = <&sys_clk 33>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; }; @@ -86,6 +90,40 @@ method = "smc"; }; + cluster0_opp: opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp@245000000 { + opp-hz = /bits/ 64 <245000000>; + clock-latency-ns = <300>; + }; + opp@250000000 { + opp-hz = /bits/ 64 <250000000>; + clock-latency-ns = <300>; + }; + opp@490000000 { + opp-hz = /bits/ 64 <490000000>; + clock-latency-ns = <300>; + }; + opp@500000000 { + opp-hz = /bits/ 64 <500000000>; + clock-latency-ns = <300>; + }; + opp@653333333 { + opp-hz = /bits/ 64 <653334000>; + clock-latency-ns = <300>; + }; + opp@666666666 { + opp-hz = /bits/ 64 <666667000>; + clock-latency-ns = <300>; + }; + opp@980000000 { + opp-hz = /bits/ 64 <980000000>; + clock-latency-ns = <300>; + }; + }; + clocks { refclk: ref { compatible = "fixed-clock";
Add a CPU clock to every CPU node and a CPU OPP table to use the generic cpufreq driver. Note: clock-latency-ns (300ns) was calculated based on the CPU-gear switch sequencer spec; it takes 12 clock cycles on the sequencer running at 50 MHz, plus a bit additional latency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+)