From patchwork Sun Nov 6 05:13:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengdong.lin@linux.intel.com X-Patchwork-Id: 9413877 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1044D60515 for ; Sun, 6 Nov 2016 07:33:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E81102918E for ; Sun, 6 Nov 2016 07:33:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C9D36291BD; Sun, 6 Nov 2016 07:33:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B46282918E for ; Sun, 6 Nov 2016 07:33:25 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 2F46C266CCD; Sun, 6 Nov 2016 08:33:24 +0100 (CET) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 32B7E266C4B; Sun, 6 Nov 2016 08:31:02 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 958902665CC; Sun, 6 Nov 2016 06:12:22 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by alsa0.perex.cz (Postfix) with ESMTP id 3F2972665B0 for ; Sun, 6 Nov 2016 06:12:15 +0100 (CET) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP; 05 Nov 2016 22:12:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,599,1473145200"; d="scan'208";a="783024730" Received: from amanda-haswell-pc.sh.intel.com ([10.239.159.21]) by FMSMGA003.fm.intel.com with ESMTP; 05 Nov 2016 22:12:12 -0700 From: mengdong.lin@linux.intel.com To: alsa-devel@alsa-project.org Date: Sun, 6 Nov 2016 13:13:46 +0800 Message-Id: <4c15d514a3ea094c5d920600f377bf766f1302ed.1478407716.git.mengdong.lin@linux.intel.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: References: Cc: Mengdong Lin , tiwai@suse.de, hardik.t.shah@intel.com, guneshwor.o.singh@intel.com, liam.r.girdwood@linux.intel.com, vinod.koul@intel.com, broonie@kernel.org, mengdong.lin@intel.com Subject: [alsa-devel] [PATCH 08/13] topology: Parse HW configurations of physical DAI links defined by C API X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mengdong Lin Add HW configurations to C API template of physical link configuration. Signed-off-by: Mengdong Lin diff --git a/include/topology.h b/include/topology.h index 1fbaeb8..0978ccf 100644 --- a/include/topology.h +++ b/include/topology.h @@ -927,6 +927,33 @@ struct snd_tplg_pcm_template { struct snd_tplg_stream_template stream[0]; /*!< supported configs */ }; + /** \struct snd_tplg_hw_config_template + * \brief Template type to describe a physical link runtime supported + * hardware config, i.e. hardware audio formats. + */ +struct snd_tplg_hw_config_template { + int id; /* unique ID - - used to match */ + unsigned int fmt; /* SND_SOC_DAI_FORMAT_ format value */ + unsigned char clock_gated; /* 1 if clock can be gated to save power */ + unsigned char invert_bclk; /* 1 for inverted BCLK, 0 for normal */ + unsigned char invert_fsync; /* 1 for inverted frame clock, 0 for normal */ + unsigned char bclk_master; /* 1 for master of BCLK, 0 for slave */ + unsigned char fsync_master; /* 1 for master of FSYNC, 0 for slave */ + unsigned char mclk_direction; /* 0 for input, 1 for output */ + unsigned short reserved; /* for 32bit alignment */ + unsigned int mclk_rate; /* MCLK or SYSCLK freqency in Hz */ + unsigned int bclk_rate; /* BCLK freqency in Hz */ + unsigned int fsync_rate; /* frame clock in Hz */ + unsigned int tdm_slots; /* number of TDM slots in use */ + unsigned int tdm_slot_width; /* width in bits for each slot */ + unsigned int tx_slots; /* bit mask for active Tx slots */ + unsigned int rx_slots; /* bit mask for active Rx slots */ + unsigned int tx_channels; /* number of Tx channels */ + unsigned int *tx_chanmap; /* array of slot number */ + unsigned int rx_channels; /* number of Rx channels */ + unsigned int *rx_chanmap; /* array of slot number */ +}; + /** \struct snd_tplg_link_template * \brief Template type for BE and CC DAI Links. */ @@ -934,7 +961,11 @@ struct snd_tplg_link_template { const char *name; /*!< link name */ int id; /*!< unique ID - used to match with existing BE and CC links */ int num_streams; /*!< number of configs */ - struct snd_tplg_stream_template stream[0]; /*!< supported configs */ + struct snd_tplg_stream_template *stream; /*!< supported configs */ + + struct snd_tplg_hw_config_template *hw_config; /*!< supported HW configs */ + int num_hw_configs; /* number of hw configs */ + int default_hw_config_id; /* default hw config ID for init */ }; /** \struct snd_tplg_obj_template diff --git a/src/topology/elem.c b/src/topology/elem.c index 724bf26..f7ff070 100644 --- a/src/topology/elem.c +++ b/src/topology/elem.c @@ -193,6 +193,7 @@ struct tplg_elem* tplg_elem_new_common(snd_tplg_t *tplg, obj_size = sizeof(struct snd_soc_tplg_pcm); break; case SND_TPLG_TYPE_BE: + case SND_TPLG_TYPE_LINK: list_add_tail(&elem->list, &tplg->be_list); obj_size = sizeof(struct snd_soc_tplg_link_config); break; diff --git a/src/topology/parser.c b/src/topology/parser.c index ed5da87..238943c 100644 --- a/src/topology/parser.c +++ b/src/topology/parser.c @@ -348,6 +348,7 @@ int snd_tplg_add_object(snd_tplg_t *tplg, snd_tplg_obj_template_t *t) return tplg_add_graph_object(tplg, t); case SND_TPLG_TYPE_PCM: return tplg_add_pcm_object(tplg, t); + case SND_TPLG_TYPE_LINK: case SND_TPLG_TYPE_BE: case SND_TPLG_TYPE_CC: return tplg_add_link_object(tplg, t); diff --git a/src/topology/pcm.c b/src/topology/pcm.c index 96a64e7..7b67d91 100644 --- a/src/topology/pcm.c +++ b/src/topology/pcm.c @@ -168,7 +168,7 @@ static int build_link(snd_tplg_t *tplg, struct tplg_elem *elem) return 0; } -/* build BE/CC DAI link configurations */ +/* build physical DAI link configurations */ int tplg_build_links(snd_tplg_t *tplg, unsigned int type) { struct list_head *base, *pos; @@ -176,6 +176,7 @@ int tplg_build_links(snd_tplg_t *tplg, unsigned int type) int err = 0; switch (type) { + case SND_TPLG_TYPE_LINK: case SND_TPLG_TYPE_BE: base = &tplg->be_list; break; @@ -189,11 +190,6 @@ int tplg_build_links(snd_tplg_t *tplg, unsigned int type) list_for_each(pos, base) { elem = list_entry(pos, struct tplg_elem, list); - if (elem->type != type) { - SNDERR("error: invalid elem '%s'\n", elem->id); - return -EINVAL; - } - err = build_link(tplg, elem); if (err < 0) return err; @@ -741,6 +737,47 @@ int tplg_add_pcm_object(snd_tplg_t *tplg, snd_tplg_obj_template_t *t) return 0; } +/* Set link HW config from C API template */ +static int set_link_hw_config(struct snd_soc_tplg_hw_config *cfg, + struct snd_tplg_hw_config_template *tpl) +{ + int i; + + cfg->size = sizeof(*cfg); + cfg->id = tpl->id; + + cfg->fmt = tpl->fmt; + cfg->clock_gated = tpl->clock_gated; + cfg->invert_bclk = tpl->invert_bclk; + cfg->invert_fsync = tpl->invert_fsync; + cfg->bclk_master = tpl->bclk_master; + cfg->fsync_master = tpl->fsync_master; + cfg->mclk_direction = tpl->mclk_direction; + cfg->reserved = tpl->reserved; + cfg->mclk_rate = tpl->mclk_rate; + cfg->bclk_rate = tpl->bclk_rate; + cfg->fsync_rate = tpl->fsync_rate; + + cfg->tdm_slots = tpl->tdm_slots; + cfg->tdm_slot_width = tpl->tdm_slot_width; + cfg->tx_slots = tpl->tx_slots; + cfg->rx_slots = tpl->rx_slots; + + if (cfg->tx_channels > SND_SOC_TPLG_MAX_CHAN + || cfg->rx_channels > SND_SOC_TPLG_MAX_CHAN) + return -EINVAL; + + cfg->tx_channels = tpl->tx_channels; + for (i = 0; i < cfg->tx_channels; i++) + cfg->tx_chanmap[i] = tpl->tx_chanmap[i]; + + cfg->rx_channels = tpl->rx_channels; + for (i = 0; i < cfg->rx_channels; i++) + cfg->rx_chanmap[i] = tpl->rx_chanmap[i]; + + return 0; +} + /* Add a physical DAI link element from C API */ int tplg_add_link_object(snd_tplg_t *tplg, snd_tplg_obj_template_t *t) { @@ -771,5 +808,12 @@ int tplg_add_link_object(snd_tplg_t *tplg, snd_tplg_obj_template_t *t) for (i = 0; i < link->num_streams; i++) tplg_add_stream_object(&link->stream[i], &link_tpl->stream[i]); + /* HW configs */ + if (link_tpl->num_hw_configs > SND_SOC_TPLG_HW_CONFIG_MAX) + return -EINVAL; + link->num_hw_configs = link_tpl->num_hw_configs; + link->default_hw_config_id = link_tpl->default_hw_config_id; + for (i = 0; i < link->num_hw_configs; i++) + set_link_hw_config(&link->hw_config[i], &link_tpl->hw_config[i]); return 0; }