From patchwork Fri Nov 11 00:15:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 9422289 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 00E6E60512 for ; Fri, 11 Nov 2016 00:15:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E67CA29859 for ; Fri, 11 Nov 2016 00:15:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DA84E2985B; Fri, 11 Nov 2016 00:15:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4B2D229859 for ; Fri, 11 Nov 2016 00:15:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B2EA66E852; Fri, 11 Nov 2016 00:15:35 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 238276E844 for ; Fri, 11 Nov 2016 00:15:29 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP; 10 Nov 2016 16:15:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.31,620,1473145200"; d="scan'208"; a="1058072209" Received: from anusha.jf.intel.com ([10.7.198.147]) by orsmga001.jf.intel.com with ESMTP; 10 Nov 2016 16:15:28 -0800 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Thu, 10 Nov 2016 16:15:20 -0800 Message-Id: <1478823321-6009-8-git-send-email-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478823321-6009-1-git-send-email-anusha.srivatsa@intel.com> References: <1478823321-6009-1-git-send-email-anusha.srivatsa@intel.com> Cc: Alex Dai , Peter Antoine Subject: [Intel-gfx] [PATCH 7/8] drm/i915/huc: Support HuC authentication X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Peter Antoine The HuC authentication is done by host2guc call. The HuC RSA keys are sent to GuC for authentication. v2: rebased on top of drm-intel-nightly. changed name format and upped version 1.7. v3: rebased on top of drm-intel-nightly. v4: changed wait_for_automic to wait_for v5: rebased. v7: rebased. v8: rebased. v9: rebased. Rename intel_huc_auh() to intel_guc_auth_huc() and place the prototype in intel_guc.h,correct the comments. v10: rebased. Tested-by: Xiang Haihao Signed-off-by: Anusha Srivatsa Signed-off-by: Alex Dai Signed-off-by: Peter Antoine Reviewed-by: Dave Gordon Reviewed-by: Jeff McGee --- drivers/gpu/drm/i915/i915_guc_submission.c | 63 ++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_guc.h | 2 +- drivers/gpu/drm/i915/intel_guc_fwif.h | 1 + drivers/gpu/drm/i915/intel_guc_loader.c | 2 + 4 files changed, 67 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index fb59e44..7809acf 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -27,6 +27,7 @@ #include #include "i915_drv.h" #include "intel_guc.h" +#include "intel_huc.h" /** * DOC: GuC-based command submission @@ -1714,3 +1715,65 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) return ret; } + +/** + * intel_guc_auth_huc() - authenticate ucode + * @dev: the drm device + * + * Triggers a HuC fw authentication request to the GuC via host-2-guc + * interface. + */ +void intel_guc_auth_huc(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_guc *guc = &dev_priv->guc; + struct intel_huc *huc = &dev_priv->huc; + struct i915_vma *vma; + int ret; + u32 data[2]; + + /* Bypass the case where there is no HuC firmware */ + if (huc->huc_fw.fetch_status == UC_FIRMWARE_NONE || + huc->huc_fw.load_status == UC_FIRMWARE_NONE) + return; + + if (guc->guc_fw.load_status != UC_FIRMWARE_SUCCESS) { + DRM_ERROR("HuC: GuC fw wasn't loaded. Can't authenticate"); + return; + } + + if (huc->huc_fw.load_status != UC_FIRMWARE_SUCCESS) { + DRM_ERROR("HuC: fw wasn't loaded. Nothing to authenticate"); + return; + } + + vma = i915_gem_object_ggtt_pin(huc->huc_fw.uc_fw_obj, NULL, 0, 0, 0); + if (IS_ERR(vma)) { + DRM_DEBUG_DRIVER("pin failed %d\n", (int)PTR_ERR(vma)); + return; + } + + + /* Invalidate GuC TLB to let GuC take the latest updates to GTT. */ + I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE); + + /* Specify auth action and where public signature is. */ + data[0] = HOST2GUC_ACTION_AUTHENTICATE_HUC; + data[1] = i915_ggtt_offset(vma) + huc->huc_fw.rsa_offset; + + ret = host2guc_action(guc, data, ARRAY_SIZE(data)); + if (ret) { + DRM_ERROR("HuC: GuC did not ack Auth request\n"); + goto out; + } + + /* Check authentication status, it should be done by now */ + ret = wait_for((I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED) > 0, 50); + if (ret) { + DRM_ERROR("HuC: Authentication failed\n"); + goto out; + } + +out: + i915_vma_unpin(vma); +} diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index ff6aba6..67a500c 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -197,5 +197,5 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv); void i915_guc_register(struct drm_i915_private *dev_priv); void i915_guc_unregister(struct drm_i915_private *dev_priv); int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val); - +void intel_guc_auth_huc(struct drm_device *dev); #endif diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h index c2a7fdd..99a092d 100644 --- a/drivers/gpu/drm/i915/intel_guc_fwif.h +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h @@ -513,6 +513,7 @@ enum host2guc_action { HOST2GUC_ACTION_EXIT_S_STATE = 0x502, HOST2GUC_ACTION_SLPC_REQUEST = 0x3003, HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000, + HOST2GUC_ACTION_AUTHENTICATE_HUC = 0x4000, HOST2GUC_ACTION_LIMIT }; diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index dc79968..11e3bbb 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -531,6 +531,8 @@ int intel_guc_setup(struct drm_device *dev) intel_uc_fw_status_repr(guc_fw->fetch_status), intel_uc_fw_status_repr(guc_fw->load_status)); + intel_guc_auth_huc(dev); + if (i915.enable_guc_submission) { if (i915.guc_log_level >= 0) gen9_enable_guc_interrupts(dev_priv);