diff mbox

drm/i915: fix the dequeue logic for single_port_submission context

Message ID 1479276676-4060-1-git-send-email-min.he@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

He, Min Nov. 16, 2016, 6:11 a.m. UTC
For a singl_port_submission context, it can only be submitted to port 0,
and there shouldn't be any other context in port 1 at the same time.
This patch is to implement the correct logic in execlists_dequeue.

Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

Comments

Chris Wilson Nov. 16, 2016, 6:52 a.m. UTC | #1
On Wed, Nov 16, 2016 at 02:11:16PM +0800, Min He wrote:
> For a singl_port_submission context, it can only be submitted to port 0,
> and there shouldn't be any other context in port 1 at the same time.
> This patch is to implement the correct logic in execlists_dequeue.

There's a simpler fix. (Other than fixing the root cause of the bug in
gvt.)
-Chris
He, Min Nov. 16, 2016, 7:03 a.m. UTC | #2
> -----Original Message-----
> From: Chris Wilson [mailto:chris@chris-wilson.co.uk]
> Sent: Wednesday, November 16, 2016 2:52 PM
> To: He, Min <min.he@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: fix the dequeue logic for
> single_port_submission context
> 
> On Wed, Nov 16, 2016 at 02:11:16PM +0800, Min He wrote:
> > For a singl_port_submission context, it can only be submitted to port 0,
> > and there shouldn't be any other context in port 1 at the same time.
> > This patch is to implement the correct logic in execlists_dequeue.
> 
> There's a simpler fix. (Other than fixing the root cause of the bug in
> gvt.)
Can you describe this simpler fix? Thanks.

> -Chris
> 
> --
> Chris Wilson, Intel Open Source Technology Centre
Chris Wilson Nov. 16, 2016, 7:07 a.m. UTC | #3
On Wed, Nov 16, 2016 at 07:03:42AM +0000, He, Min wrote:
> 
> > -----Original Message-----
> > From: Chris Wilson [mailto:chris@chris-wilson.co.uk]
> > Sent: Wednesday, November 16, 2016 2:52 PM
> > To: He, Min <min.he@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PATCH] drm/i915: fix the dequeue logic for
> > single_port_submission context
> > 
> > On Wed, Nov 16, 2016 at 02:11:16PM +0800, Min He wrote:
> > > For a singl_port_submission context, it can only be submitted to port 0,
> > > and there shouldn't be any other context in port 1 at the same time.
> > > This patch is to implement the correct logic in execlists_dequeue.
> > 
> > There's a simpler fix. (Other than fixing the root cause of the bug in
> > gvt.)
> Can you describe this simpler fix? Thanks.

Instead of changing the flow of the logic, add the break inside the
cannot merge loop. Then you don't have multiple "cannot merge"
questions.

Also, my preferred solution would be to remove the gvt hacks that are
impacting other users.
-Chris
He, Min Nov. 16, 2016, 7:40 a.m. UTC | #4
> -----Original Message-----
> From: Chris Wilson [mailto:chris@chris-wilson.co.uk]
> Sent: Wednesday, November 16, 2016 3:07 PM
> To: He, Min <min.he@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: fix the dequeue logic for
> single_port_submission context
> 
> On Wed, Nov 16, 2016 at 07:03:42AM +0000, He, Min wrote:
> >
> > > -----Original Message-----
> > > From: Chris Wilson [mailto:chris@chris-wilson.co.uk]
> > > Sent: Wednesday, November 16, 2016 2:52 PM
> > > To: He, Min <min.he@intel.com>
> > > Cc: intel-gfx@lists.freedesktop.org
> > > Subject: Re: [Intel-gfx] [PATCH] drm/i915: fix the dequeue logic for
> > > single_port_submission context
> > >
> > > On Wed, Nov 16, 2016 at 02:11:16PM +0800, Min He wrote:
> > > > For a singl_port_submission context, it can only be submitted to port 0,
> > > > and there shouldn't be any other context in port 1 at the same time.
> > > > This patch is to implement the correct logic in execlists_dequeue.
> > >
> > > There's a simpler fix. (Other than fixing the root cause of the bug in
> > > gvt.)
> > Can you describe this simpler fix? Thanks.
> 
> Instead of changing the flow of the logic, add the break inside the
> cannot merge loop. Then you don't have multiple "cannot merge"
> questions.
Thanks, will send out a v2 patch.

> 
> Also, my preferred solution would be to remove the gvt hacks that are
> impacting other users.
> -Chris
> 
> --
> Chris Wilson, Intel Open Source Technology Centre
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f50feaa..be83e8c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -424,9 +424,6 @@  static bool can_merge_ctx(const struct i915_gem_context *prev,
 	if (prev != next)
 		return false;
 
-	if (ctx_single_port_submission(prev))
-		return false;
-
 	return true;
 }
 
@@ -477,6 +474,13 @@  static void execlists_dequeue(struct intel_engine_cs *engine)
 		struct drm_i915_gem_request *cursor =
 			rb_entry(rb, typeof(*cursor), priotree.node);
 
+		/* If last ctx is single_submission, it means we can only
+		 * submit this context in port 0, and cannot submit another
+		 * context in port 1 at the same time. So we will break here
+		 * in this situation.
+		 */
+		if (last && ctx_single_port_submission(last->ctx))
+			break;
 		/* Can we combine this request with the current port? It has to
 		 * be the same context/ringbuffer and not have any exceptions
 		 * (e.g. GVT saying never to combine contexts).