From patchwork Thu Nov 17 00:17:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Wilcox X-Patchwork-Id: 9433021 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C76A260755 for ; Wed, 16 Nov 2016 22:35:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B91AC2917B for ; Wed, 16 Nov 2016 22:35:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ADFE72917F; Wed, 16 Nov 2016 22:35:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 017C129177 for ; Wed, 16 Nov 2016 22:35:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1422650AbcKPWf3 (ORCPT ); Wed, 16 Nov 2016 17:35:29 -0500 Received: from p3plsmtps2ded02.prod.phx3.secureserver.net ([208.109.80.59]:59486 "EHLO p3plsmtps2ded02.prod.phx3.secureserver.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S939924AbcKPWfX (ORCPT ); Wed, 16 Nov 2016 17:35:23 -0500 X-Greylist: delayed 676 seconds by postgrey-1.27 at vger.kernel.org; Wed, 16 Nov 2016 17:35:19 EST Received: from linuxonhyperv.com ([72.167.245.219]) by : HOSTING RELAY : with SMTP id 78bec1z7WO2Wo78bfc4Yk7; Wed, 16 Nov 2016 15:23:03 -0700 x-originating-ip: 72.167.245.219 Received: by linuxonhyperv.com (Postfix, from userid 528) id 4E26E190123; Wed, 16 Nov 2016 16:18:00 -0800 (PST) From: Matthew Wilcox To: linux-kernel@vger.kernel.org, Andrew Morton , Konstantin Khlebnikov , Ross Zwisler Cc: linux-fsdevel@vger.kernel.org, Matthew Wilcox , linux-mm@kvack.org, "Kirill A . Shutemov" Subject: [PATCH 26/29] idr: Reduce the number of bits per level from 8 to 6 Date: Wed, 16 Nov 2016 16:17:30 -0800 Message-Id: <1479341856-30320-66-git-send-email-mawilcox@linuxonhyperv.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1479341856-30320-1-git-send-email-mawilcox@linuxonhyperv.com> References: <1479341856-30320-1-git-send-email-mawilcox@linuxonhyperv.com> X-CMAE-Envelope: MS4wfC7gyTSeBxx+x4f2XL9XwexeU1IrJs4MMrfTSoDLLEB7MYdCsaqYWRCfdzZaGx67u9KAKrpDFT3rcTAG2kVFZJ5lRYc3N4sSyNC/CpSWb5PmkSJ4QHHq dmYPJqPM9lJh475rX7Ww8k5HcsQ7PlbZKHpzJn0CGefKRvoqfdMJysusIIFbD7Go3R1cllGS+wV2MK42gJkl0zh0o0PVMSXaJpwpYjzQO6W/02ucnqAJIFKw lnymGa0KQR5crmc8OplxRhqui7ZJ1aFPDxuNa0vAptuJ/htJLZpTykxtRyWp+C72ZG0O4dRV0w9szERz0dLOPnu3KzNpgb5zGk2klrQlf+j1TkmcQikCWKhD 4vrbz0CzwJv5aYtNXcqhFqfvwpDxqCGGvcd3IUqs2Vrp6ABUyozkC9r19DXfyKvUktI7xdU+i1hKtwGKHXrFccA2oxfo8/UbH+WDDfxwkVmy/+sQ/lg= Sender: linux-fsdevel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fsdevel@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Matthew Wilcox In preparation for merging the IDR and radix tree, reduce the fanout at each level from 256 to 64. If this causes a performance problem then a bisect will point to this commit, and we'll have a better idea about what we might do to fix it. Signed-off-by: Matthew Wilcox --- include/linux/idr.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/linux/idr.h b/include/linux/idr.h index 1eb755f..3c01b89 100644 --- a/include/linux/idr.h +++ b/include/linux/idr.h @@ -18,12 +18,11 @@ #include /* - * We want shallower trees and thus more bits covered at each layer. 8 - * bits gives us large enough first layer for most use cases and maximum - * tree depth of 4. Each idr_layer is slightly larger than 2k on 64bit and - * 1k on 32bit. + * Using 6 bits at each layer allows us to allocate 7 layers out of each page. + * 8 bits only gave us 3 layers out of every pair of pages, which is less + * efficient except for trees with a largest element between 192-255 inclusive. */ -#define IDR_BITS 8 +#define IDR_BITS 6 #define IDR_SIZE (1 << IDR_BITS) #define IDR_MASK ((1 << IDR_BITS)-1)