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[1/2] arm64: dts: rockchip: add max-link-speed for rk3399

Message ID 1481881357-1793-1-git-send-email-shawn.lin@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Shawn Lin Dec. 16, 2016, 9:42 a.m. UTC
Per the errata of TRM, rk3399 won't support gen2 from
now on, so let's set max-link-speed to 1 in order not
to doing training for gen2.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Heiko Stuebner Jan. 6, 2017, 9:11 a.m. UTC | #1
Am Freitag, 16. Dezember 2016, 17:42:36 CET schrieb Shawn Lin:
> Per the errata of TRM, rk3399 won't support gen2 from
> now on, so let's set max-link-speed to 1 in order not
> to doing training for gen2.
> 
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

I've moved the new line above msi-map and applied the result for 4.11


Thanks
Heiko
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 66a11d1..0be5f71 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -297,6 +297,7 @@ 
 				<0 0 0 3 &pcie0_intc 2>,
 				<0 0 0 4 &pcie0_intc 3>;
 		msi-map = <0x0 &its 0x0 0x1000>;
+		max-link-speed = <1>;
 		phys = <&pcie_phy>;
 		phy-names = "pcie-phy";
 		ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000