[v12,06/10] x86: change default load address from 1 MiB to 2 MiB
diff mbox

Message ID 1484876060-2236-7-git-send-email-daniel.kiper@oracle.com
State New, archived
Headers show

Commit Message

Daniel Kiper Jan. 20, 2017, 1:34 a.m. UTC
Subsequent patches introducing relocatable early boot code play with
page tables using 2 MiB huge pages. If load address is not aligned at
2 MiB then code touching such page tables must have special cases for
start and end of Xen image memory region. So, let's make life easier
and move default load address from 1 MiB to 2 MiB. This way page table
code will be nice and easy. Hence, there is a chance that it will be
less error prone too... :-)))

Additionally, drop first 2 MiB mapping from Xen image mapping.
It is no longer needed.

Signed-off-by: Daniel Kiper <daniel.kiper@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
---
v8 - suggestions/fixes:
   - drop first 2 MiB mapping from Xen image mapping
     (suggested by Jan Beulich),
   - improve commit message.

v7 - suggestions/fixes:
   - minor cleanups
     (suggested by Jan Beulich).
---
 xen/arch/x86/Makefile      |    2 +-
 xen/arch/x86/Rules.mk      |    3 +++
 xen/arch/x86/boot/head.S   |    8 --------
 xen/arch/x86/boot/x86_64.S |    5 +++--
 xen/arch/x86/setup.c       |    3 ++-
 xen/arch/x86/xen.lds.S     |    2 +-
 6 files changed, 10 insertions(+), 13 deletions(-)

Comments

Doug Goldstein Jan. 20, 2017, 4:06 a.m. UTC | #1
On 1/19/17 8:34 PM, Daniel Kiper wrote:
> Subsequent patches introducing relocatable early boot code play with
> page tables using 2 MiB huge pages. If load address is not aligned at
> 2 MiB then code touching such page tables must have special cases for
> start and end of Xen image memory region. So, let's make life easier
> and move default load address from 1 MiB to 2 MiB. This way page table
> code will be nice and easy. Hence, there is a chance that it will be
> less error prone too... :-)))
> 
> Additionally, drop first 2 MiB mapping from Xen image mapping.
> It is no longer needed.
> 
> Signed-off-by: Daniel Kiper <daniel.kiper@oracle.com>
> Reviewed-by: Jan Beulich <jbeulich@suse.com>
> Reviewed-by: Doug Goldstein <cardoe@cardoe.com>

FWIW, I can't find where I offered my R-b for this patch. Its part of
the series I've said fails on my hardware.
Jan Beulich Jan. 20, 2017, 8:49 a.m. UTC | #2
>>> On 20.01.17 at 05:06, <cardoe@cardoe.com> wrote:
> On 1/19/17 8:34 PM, Daniel Kiper wrote:
>> Subsequent patches introducing relocatable early boot code play with
>> page tables using 2 MiB huge pages. If load address is not aligned at
>> 2 MiB then code touching such page tables must have special cases for
>> start and end of Xen image memory region. So, let's make life easier
>> and move default load address from 1 MiB to 2 MiB. This way page table
>> code will be nice and easy. Hence, there is a chance that it will be
>> less error prone too... :-)))
>> 
>> Additionally, drop first 2 MiB mapping from Xen image mapping.
>> It is no longer needed.
>> 
>> Signed-off-by: Daniel Kiper <daniel.kiper@oracle.com>
>> Reviewed-by: Jan Beulich <jbeulich@suse.com>
>> Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
> 
> FWIW, I can't find where I offered my R-b for this patch. Its part of
> the series I've said fails on my hardware.

Looks like you had responded to v11 00/13 without naming specific
patches the tag would apply to, so I think Daniel legitimately applied
it to the entire series. Whether he should have dropped it again
after your report of things not working is kind of fuzzy, unless at
some point you've explicitly withdrawn them (which I don't recall
you having done).

Jan
Daniel Kiper Jan. 20, 2017, 10:29 a.m. UTC | #3
On Fri, Jan 20, 2017 at 01:49:46AM -0700, Jan Beulich wrote:
> >>> On 20.01.17 at 05:06, <cardoe@cardoe.com> wrote:
> > On 1/19/17 8:34 PM, Daniel Kiper wrote:
> >> Subsequent patches introducing relocatable early boot code play with
> >> page tables using 2 MiB huge pages. If load address is not aligned at
> >> 2 MiB then code touching such page tables must have special cases for
> >> start and end of Xen image memory region. So, let's make life easier
> >> and move default load address from 1 MiB to 2 MiB. This way page table
> >> code will be nice and easy. Hence, there is a chance that it will be
> >> less error prone too... :-)))
> >>
> >> Additionally, drop first 2 MiB mapping from Xen image mapping.
> >> It is no longer needed.
> >>
> >> Signed-off-by: Daniel Kiper <daniel.kiper@oracle.com>
> >> Reviewed-by: Jan Beulich <jbeulich@suse.com>
> >> Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
> >
> > FWIW, I can't find where I offered my R-b for this patch. Its part of
> > the series I've said fails on my hardware.
>
> Looks like you had responded to v11 00/13 without naming specific
> patches the tag would apply to, so I think Daniel legitimately applied
> it to the entire series. Whether he should have dropped it again
> after your report of things not working is kind of fuzzy, unless at
> some point you've explicitly withdrawn them (which I don't recall
> you having done).

Thanks Jan. Here is the exact email:

https://lists.xen.org/archives/html/xen-devel/2016-12/msg02151.html

Daniel

Patch
diff mbox

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 08e9f7b..e5b840e 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -90,7 +90,7 @@  all_symbols =
 endif
 
 $(TARGET): $(TARGET)-syms $(efi-y) boot/mkelf32
-	./boot/mkelf32 $(notes_phdrs) $(TARGET)-syms $(TARGET) 0x100000 \
+	./boot/mkelf32 $(notes_phdrs) $(TARGET)-syms $(TARGET) $(XEN_IMG_OFFSET) \
 	               `$(NM) $(TARGET)-syms | sed -ne 's/^\([^ ]*\) . __2M_rwdata_end$$/0x\1/p'`
 
 ALL_OBJS := $(BASEDIR)/arch/x86/boot/built_in.o $(BASEDIR)/arch/x86/efi/built_in.o $(ALL_OBJS)
diff --git a/xen/arch/x86/Rules.mk b/xen/arch/x86/Rules.mk
index 42be4bc..36e6386 100644
--- a/xen/arch/x86/Rules.mk
+++ b/xen/arch/x86/Rules.mk
@@ -1,9 +1,12 @@ 
 ########################################
 # x86-specific definitions
 
+XEN_IMG_OFFSET := 0x200000
+
 CFLAGS += -I$(BASEDIR)/include
 CFLAGS += -I$(BASEDIR)/include/asm-x86/mach-generic
 CFLAGS += -I$(BASEDIR)/include/asm-x86/mach-default
+CFLAGS += -DXEN_IMG_OFFSET=$(XEN_IMG_OFFSET)
 CFLAGS += '-D__OBJECT_LABEL__=$(subst /,$$,$(subst -,_,$(subst $(BASEDIR)/,,$(CURDIR))/$@))'
 
 # Prevent floating-point variables from creeping into Xen.
diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S
index b8f727a..22bd68d 100644
--- a/xen/arch/x86/boot/head.S
+++ b/xen/arch/x86/boot/head.S
@@ -482,14 +482,6 @@  trampoline_setup:
         mov     %eax,sym_phys(boot_tsc_stamp)
         mov     %edx,sym_phys(boot_tsc_stamp+4)
 
-        /*
-         * During boot, hook 4kB mappings of first 2MB of memory into L2.
-         * This avoids mixing cachability for the legacy VGA region, and is
-         * corrected when Xen relocates itself.
-         */
-        mov     $sym_phys(l1_identmap)+__PAGE_HYPERVISOR,%edi
-        mov     %edi,sym_phys(l2_xenmap)
-
         /* Apply relocations to bootstrap trampoline. */
         mov     sym_phys(trampoline_phys),%edx
         mov     $sym_phys(__trampoline_rel_start),%edi
diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
index 139b2ca..7890374 100644
--- a/xen/arch/x86/boot/x86_64.S
+++ b/xen/arch/x86/boot/x86_64.S
@@ -121,8 +121,9 @@  GLOBAL(l2_identmap)
  * page.
  */
 GLOBAL(l2_xenmap)
-        idx = 0
-        .rept 8
+        .quad 0
+        idx = 1
+        .rept 7
         .quad sym_phys(__image_base__) + (idx << L2_PAGETABLE_SHIFT) + (PAGE_HYPERVISOR | _PAGE_PSE)
         idx = idx + 1
         .endr
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d4b7d25..e6f6ef1 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -999,7 +999,8 @@  void __init noreturn __start_xen(unsigned long mbi_p)
              * Undo the temporary-hooking of the l1_identmap.  __2M_text_start
              * is contained in this PTE.
              */
-            BUG_ON(l2_table_offset((unsigned long)_erodata) ==
+            BUG_ON(using_2M_mapping() &&
+                   l2_table_offset((unsigned long)_erodata) ==
                    l2_table_offset((unsigned long)_stext));
             *pl2e++ = l2e_from_pfn(xen_phys_start >> PAGE_SHIFT,
                                    PAGE_HYPERVISOR_RX | _PAGE_PSE);
diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
index 3a02b2b..f9cdfc1 100644
--- a/xen/arch/x86/xen.lds.S
+++ b/xen/arch/x86/xen.lds.S
@@ -55,7 +55,7 @@  SECTIONS
   __2M_text_start = .;         /* Start of 2M superpages, mapped RX. */
 #endif
 
-  . = __XEN_VIRT_START + MB(1);
+  . = __XEN_VIRT_START + XEN_IMG_OFFSET;
   _start = .;
   .text : {
         _stext = .;            /* Text and read-only data */