[v2] drm/i915: Fix vGPU balloon for ggtt guard page
diff mbox

Message ID 20170310022238.3191-1-zhenyuw@linux.intel.com
State New
Headers show

Commit Message

Zhenyu Wang March 10, 2017, 2:22 a.m. UTC
From commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard
page at the end of the GTT"), we no longer explicitly subtract guard page
at end for GGTT address space init, so shouldn't subtract that for vGPU
balloon too, as that will leave that end page to be available for
vGPU. Change balloon to cover full range too.

This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g
cmd parser that guest kernel uses end page as scratch then try to run
MI_STORE_REG_MEM onto it.

v2: remove old comments

Cc: Terrence Xu <terrence.xu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_vgpu.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

Comments

Chris Wilson March 13, 2017, 1:39 p.m. UTC | #1
On Fri, Mar 10, 2017 at 10:22:38AM +0800, Zhenyu Wang wrote:
> From commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard
> page at the end of the GTT"), we no longer explicitly subtract guard page
> at end for GGTT address space init, so shouldn't subtract that for vGPU
> balloon too, as that will leave that end page to be available for
> vGPU. Change balloon to cover full range too.
> 
> This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g
> cmd parser that guest kernel uses end page as scratch then try to run
> MI_STORE_REG_MEM onto it.
> 
> v2: remove old comments
> 
> Cc: Terrence Xu <terrence.xu@intel.com>
> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
Zhenyu Wang March 17, 2017, 9:25 a.m. UTC | #2
On 2017.03.13 13:39:18 +0000, Chris Wilson wrote:
> On Fri, Mar 10, 2017 at 10:22:38AM +0800, Zhenyu Wang wrote:
> > From commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard
> > page at the end of the GTT"), we no longer explicitly subtract guard page
> > at end for GGTT address space init, so shouldn't subtract that for vGPU
> > balloon too, as that will leave that end page to be available for
> > vGPU. Change balloon to cover full range too.
> > 
> > This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g
> > cmd parser that guest kernel uses end page as scratch then try to run
> > MI_STORE_REG_MEM onto it.
> > 
> > v2: remove old comments
> > 
> > Cc: Terrence Xu <terrence.xu@intel.com>
> > Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

ping for commit to dinq, as required to run lastest drm-intel in guest.
Chris Wilson March 17, 2017, 9:42 a.m. UTC | #3
On Fri, Mar 17, 2017 at 05:25:35PM +0800, Zhenyu Wang wrote:
> On 2017.03.13 13:39:18 +0000, Chris Wilson wrote:
> > On Fri, Mar 10, 2017 at 10:22:38AM +0800, Zhenyu Wang wrote:
> > > From commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard
> > > page at the end of the GTT"), we no longer explicitly subtract guard page
> > > at end for GGTT address space init, so shouldn't subtract that for vGPU
> > > balloon too, as that will leave that end page to be available for
> > > vGPU. Change balloon to cover full range too.
> > > 
> > > This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g
> > > cmd parser that guest kernel uses end page as scratch then try to run
> > > MI_STORE_REG_MEM onto it.
> > > 
> > > v2: remove old comments
> > > 
> > > Cc: Terrence Xu <terrence.xu@intel.com>
> > > Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> 
> ping for commit to dinq, as required to run lastest drm-intel in guest.

Applied, I had assumed you would pick up the gvt tree.
-Chris
Zhenyu Wang March 17, 2017, 9:46 a.m. UTC | #4
On 2017.03.17 09:42:37 +0000, Chris Wilson wrote:
> On Fri, Mar 17, 2017 at 05:25:35PM +0800, Zhenyu Wang wrote:
> > On 2017.03.13 13:39:18 +0000, Chris Wilson wrote:
> > > On Fri, Mar 10, 2017 at 10:22:38AM +0800, Zhenyu Wang wrote:
> > > > From commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard
> > > > page at the end of the GTT"), we no longer explicitly subtract guard page
> > > > at end for GGTT address space init, so shouldn't subtract that for vGPU
> > > > balloon too, as that will leave that end page to be available for
> > > > vGPU. Change balloon to cover full range too.
> > > > 
> > > > This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g
> > > > cmd parser that guest kernel uses end page as scratch then try to run
> > > > MI_STORE_REG_MEM onto it.
> > > > 
> > > > v2: remove old comments
> > > > 
> > > > Cc: Terrence Xu <terrence.xu@intel.com>
> > > > Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
> > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> > 
> > ping for commit to dinq, as required to run lastest drm-intel in guest.
> 
> Applied, I had assumed you would pick up the gvt tree.

oh, no, this depends on i915 change, so should align there.

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 14014068dfcf..4ab8a973b61f 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -218,13 +218,9 @@  int intel_vgt_balloon(struct drm_i915_private *dev_priv)
 			goto err;
 	}
 
-	/*
-	 * No need to partition out the last physical page,
-	 * because it is reserved to the guard page.
-	 */
-	if (unmappable_end < ggtt_end - PAGE_SIZE) {
+	if (unmappable_end < ggtt_end) {
 		ret = vgt_balloon_space(ggtt, &bl_info.space[3],
-					unmappable_end, ggtt_end - PAGE_SIZE);
+					unmappable_end, ggtt_end);
 		if (ret)
 			goto err;
 	}