drm/i915/guc: write wopcm related register once during uc init
diff mbox

Message ID 1491524332-23860-1-git-send-email-daniele.ceraolospurio@intel.com
State New
Headers show

Commit Message

Daniele Ceraolo Spurio April 7, 2017, 12:18 a.m. UTC
The wopcm registers are write-once, so any write after the first one
will just be ignored. The registers survive a GPU reset but not
always a suspend/resume cycle, so to keep things simple keep the
writes in the intel_uc_init_hw function instead of moving it earlier
to make sure we attempt them every time we try to load GuC.

Cc: Jeff McGee <jeff.mcgee@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_loader.c | 4 ----
 drivers/gpu/drm/i915/intel_huc.c        | 5 -----
 drivers/gpu/drm/i915/intel_uc.c         | 5 +++++
 3 files changed, 5 insertions(+), 9 deletions(-)

Comments

Joonas Lahtinen April 13, 2017, 10:59 a.m. UTC | #1
On to, 2017-04-06 at 17:18 -0700, Daniele Ceraolo Spurio wrote:
> The wopcm registers are write-once, so any write after the first one
> will just be ignored. The registers survive a GPU reset but not
> always a suspend/resume cycle, so to keep things simple keep the
> writes in the intel_uc_init_hw function instead of moving it earlier
> to make sure we attempt them every time we try to load GuC.
> 
> Cc: Jeff McGee <jeff.mcgee@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

This is an improvement, so:

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

To be exact, shouldn't we read the value and see if it has been written
previously (bit 1). i915 module can be removed and added multiple
times.

Regards, Joonas
Joonas Lahtinen April 13, 2017, 11:02 a.m. UTC | #2
On pe, 2017-04-07 at 00:39 +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/guc: write wopcm related register once during uc init
> URL   : https://patchwork.freedesktop.org/series/22625/
> State : success

Pushed the patch.

Regards, Joonas
Joonas Lahtinen April 13, 2017, 11:15 a.m. UTC | #3
On to, 2017-04-13 at 14:02 +0300, Joonas Lahtinen wrote:
> On pe, 2017-04-07 at 00:39 +0000, Patchwork wrote:
> > 
> > == Series Details ==
> > 
> > Series: drm/i915/guc: write wopcm related register once during uc init
> > URL   : https://patchwork.freedesktop.org/series/22625/
> > State : success
> 
> Pushed the patch.

Except that I didn't yet. Patchwork or somebody else managed to mangle
the "From: " field.

Regards, Joonas

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 2793c01..7678873 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -280,10 +280,6 @@  static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
 
 	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
-	/* init WOPCM */
-	I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv));
-	I915_WRITE(DMA_GUC_WOPCM_OFFSET, GUC_WOPCM_OFFSET_VALUE);
-
 	/* Enable MIA caching. GuC clock gating is disabled. */
 	I915_WRITE(GUC_SHIM_CONTROL, GUC_SHIM_CONTROL_VALUE);
 
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 385cacb..8cf34bc 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -99,11 +99,6 @@  static int huc_ucode_xfer(struct drm_i915_private *dev_priv)
 
 	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
-	/* init WOPCM */
-	I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv));
-	I915_WRITE(DMA_GUC_WOPCM_OFFSET, GUC_WOPCM_OFFSET_VALUE |
-			HUC_LOADING_AGENT_GUC);
-
 	/* Set the source address for the uCode */
 	offset = guc_ggtt_offset(vma) + huc_fw->header_offset;
 	I915_WRITE(DMA_ADDR_0_LOW, lower_32_bits(offset));
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index c117424..c14793e 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -274,6 +274,11 @@  int intel_uc_init_hw(struct drm_i915_private *dev_priv)
 			goto err_guc;
 	}
 
+	/* init WOPCM */
+	I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv));
+	I915_WRITE(DMA_GUC_WOPCM_OFFSET,
+		   GUC_WOPCM_OFFSET_VALUE | HUC_LOADING_AGENT_GUC);
+
 	/* WaEnableuKernelHeaderValidFix:skl */
 	/* WaEnableGuCBootHashCheckNotSet:skl,bxt,kbl */
 	if (IS_GEN9(dev_priv))