| Message ID | 1491573329-7066-3-git-send-email-dmitry.v.rogozhkin@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On pe, 2017-04-07 at 06:55 -0700, Dmitry Rogozhkin wrote: > BDW supports RCS slices powering on/off. To do that we need make_rpcs > executed on BDW to flash slices configuration. > > Change-Id: Ia80b1be329bedc57cc61078ea18ecb3d2580c16a > Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com> > CC: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > CC: Zhipeng Gong <zhipeng.gong@intel.com> > CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > CC: Chris Wilson <chris@chris-wilson.co.uk> Maybe this patch should get rid of the "!IS_SKYLAKE(dev_priv)" restriction in the setter function, too? Regards, Joonas
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 2a1b641..bc650df 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1732,7 +1732,7 @@ int logical_xcs_ring_init(struct intel_engine_cs *engine) * No explicit RPCS request is needed to ensure full * slice/subslice/EU enablement prior to Gen9. */ - if (INTEL_GEN(dev_priv) < 9) + if (INTEL_GEN(dev_priv) < 8) return 0; /*
BDW supports RCS slices powering on/off. To do that we need make_rpcs executed on BDW to flash slices configuration. Change-Id: Ia80b1be329bedc57cc61078ea18ecb3d2580c16a Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com> CC: Tvrtko Ursulin <tvrtko.ursulin@intel.com> CC: Zhipeng Gong <zhipeng.gong@intel.com> CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> CC: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/intel_lrc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)